190 lines
5.1 KiB
C
190 lines
5.1 KiB
C
/***************************************************************************
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*
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* Copyright 2015-2019 BES.
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* All rights reserved. All unpublished rights reserved.
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*
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* No part of this work may be used or reproduced in any form or by any
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* means, or stored in a database or retrieval system, without prior written
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* permission of BES.
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*
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* Use of this work is governed by a license granted by BES.
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* This work contains confidential and proprietary information of
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* BES. which is protected by copyright, trade secret,
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* trademark and other intellectual property rights.
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*
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****************************************************************************/
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#ifndef DRV_NORFLASH_H
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#define DRV_NORFLASH_H
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#include "plat_types.h"
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#include "hal_norflash.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define NORFLASH_ID_LEN 3
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enum DRV_NORFLASH_ERASE_T {
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#ifdef PUYA_FLASH_ERASE_PAGE_ENABLE
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DRV_NORFLASH_ERASE_PAGE,
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#endif
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DRV_NORFLASH_ERASE_SECTOR,
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DRV_NORFLASH_ERASE_BLOCK,
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DRV_NORFLASH_ERASE_CHIP,
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};
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enum DRV_NORFLASH_W_STATUS_T {
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DRV_NORFLASH_W_STATUS_INIT,
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DRV_NORFLASH_W_STATUS_QE,
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DRV_NORFLASH_W_STATUS_LB,
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DRV_NORFLASH_W_STATUS_BP,
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};
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enum SPEED_RATIO_T {
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SPEED_RATIO_1_EIGHTH,
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SPEED_RATIO_2_EIGHTH,
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SPEED_RATIO_3_EIGHTH,
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SPEED_RATIO_4_EIGHTH,
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SPEED_RATIO_5_EIGHTH,
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SPEED_RATIO_6_EIGHTH,
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SPEED_RATIO_7_EIGHTH,
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SPEED_RATIO_8_EIGHTH,
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};
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enum DRV_NORFLASH_CALIB_T {
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DRV_NORFLASH_CALIB_FLASH_ID,
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DRV_NORFLASH_CALIB_MAGIC_WORD,
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DRV_NORFLASH_CALIB_QTY,
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};
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union DRV_NORFLASH_SPEED_RATIO_T {
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struct {
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uint8_t std_read :3;
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uint8_t others :3;
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uint8_t reserved :2;
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} s;
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uint8_t v;
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};
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union DRV_NORFLASH_SEC_REG_CFG_T {
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struct {
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uint16_t enabled :1;
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uint16_t base :2;
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uint16_t size :2;
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uint16_t offset :2;
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uint16_t cnt :2;
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uint16_t pp :2;
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uint16_t lb :2;
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uint16_t reserved :3;
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} s;
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uint16_t v;
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};
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typedef int (*NORFLASH_WRITE_STATUS_CB)(enum DRV_NORFLASH_W_STATUS_T type, uint32_t param);
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struct NORFLASH_CFG_T {
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const uint8_t id[NORFLASH_ID_LEN];
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const union DRV_NORFLASH_SPEED_RATIO_T speed_ratio;
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const uint8_t crm_en_bits;
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const uint8_t crm_dis_bits;
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const uint16_t block_protect_mask;
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const union DRV_NORFLASH_SEC_REG_CFG_T sec_reg_cfg;
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const uint16_t page_size;
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const uint16_t sector_size;
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const uint32_t block_size;
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const uint32_t total_size;
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const uint32_t max_speed;
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const uint32_t mode;
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const NORFLASH_WRITE_STATUS_CB write_status;
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};
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uint8_t norflash_read_status_s0_s7(void);
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uint8_t norflash_read_status_s8_s15(void);
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void norflash_status_WEL_0_wait(void);
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enum HAL_NORFLASH_RET_T norflash_status_WIP_1_wait(int suspend);
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uint32_t norflash_get_supported_mode(void);
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uint32_t norflash_get_current_mode(void);
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union DRV_NORFLASH_SEC_REG_CFG_T norflash_get_security_register_config(void);
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uint32_t norflash_get_block_protect_mask(void);
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void norflash_reset(void);
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int norflash_get_size(uint32_t *total_size, uint32_t *block_size, uint32_t *sector_size, uint32_t *page_size);
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int norflash_set_mode(uint32_t op);
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int norflash_pre_operation(void);
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int norflash_post_operation(void);
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int norflash_read_reg(uint8_t cmd, uint8_t *val, uint32_t len);
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int norflash_read_reg_ex(uint8_t cmd, uint8_t *param, uint32_t param_len, uint8_t *val, uint32_t len);
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int norflash_write_reg(uint8_t cmd, const uint8_t *val, uint32_t len);
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int norflash_init_sample_delay_by_div(uint32_t div);
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void norflash_set_sample_delay_index(uint32_t index);
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uint32_t norflash_get_sample_delay_index(void);
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int norflash_sample_delay_calib(enum DRV_NORFLASH_CALIB_T type);
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void norflash_show_calib_result(void);
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int norflash_init_div(const struct HAL_NORFLASH_CONFIG_T *cfg);
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int norflash_match_chip(const uint8_t *id, uint32_t len);
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int norflash_get_id(uint8_t *value, uint32_t len);
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int norflash_get_unique_id(uint8_t *value, uint32_t len);
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enum HAL_NORFLASH_RET_T norflash_erase(uint32_t start_address, enum DRV_NORFLASH_ERASE_T type, int suspend);
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enum HAL_NORFLASH_RET_T norflash_erase_resume(int suspend);
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enum HAL_NORFLASH_RET_T norflash_write(uint32_t start_address, const uint8_t *buffer, uint32_t len, int suspend);
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enum HAL_NORFLASH_RET_T norflash_write_resume(int suspend);
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int norflash_suspend_check_irq(uint32_t irq_num);
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int norflash_read(uint32_t start_address, uint8_t *buffer, uint32_t len);
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void norflash_sleep(void);
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void norflash_wakeup(void);
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int norflash_init_status(uint32_t status);
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int norflash_set_block_protection(uint32_t bp);
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int norflash_security_register_lock(uint32_t id);
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enum HAL_NORFLASH_RET_T norflash_security_register_erase(uint32_t start_address);
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enum HAL_NORFLASH_RET_T norflash_security_register_write(uint32_t start_address, const uint8_t *buffer, uint32_t len);
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int norflash_security_register_read(uint32_t start_address, uint8_t *buffer, uint32_t len);
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uint32_t norflash_security_register_enable_read(void);
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void norflash_security_register_disable_read(uint32_t mode);
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#ifdef __cplusplus
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}
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#endif
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#endif /* DRV_NORFLASH_H */
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