550 lines
18 KiB
C++
550 lines
18 KiB
C++
/***************************************************************************
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*
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* Copyright 2015-2019 BES.
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* All rights reserved. All unpublished rights reserved.
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*
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* No part of this work may be used or reproduced in any form or by any
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* means, or stored in a database or retrieval system, without prior written
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* permission of BES.
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*
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* Use of this work is governed by a license granted by BES.
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* This work contains confidential and proprietary information of
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* BES. which is protected by copyright, trade secret,
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* trademark and other intellectual property rights.
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*
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****************************************************************************/
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#ifdef RTOS
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#include "plat_types.h"
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#include "bt_drv.h"
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#include "bt_drv_2300p_internal.h"
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#include "hal_intersys.h"
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#include "hal_i2c.h"
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#include "hal_uart.h"
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#include "hal_iomux.h"
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#include "hal_chipid.h"
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#include "string.h"
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#include "bt_drv_interface.h"
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struct dbg_nonsig_tester_result_tag
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{
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uint16_t pkt_counters;
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uint16_t head_errors;
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uint16_t payload_errors;
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int16_t avg_estsw;
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int16_t avg_esttpl;
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uint32_t payload_bit_errors;
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};
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struct bt_drv_capval_calc_t
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{
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int16_t estsw_a;
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int16_t estsw_b;
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uint8_t cdac_a;
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uint8_t cdac_b;
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};
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static struct dbg_nonsig_tester_result_tag nonsig_tester_result;
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#ifdef RTOS
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static osThreadId calib_thread_tid = NULL;
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#else
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static bool calib_thread_tid = false;
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#endif
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static bool calib_running = false;
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static struct bt_drv_capval_calc_t capval_calc ={
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.estsw_a = 0,
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.estsw_b = 0,
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.cdac_a = 0,
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.cdac_b = 0,
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};
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#define bt_drv_calib_capval_calc_reset() do{ \
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memset(&capval_calc, 0, sizeof(capval_calc)); \
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}while(0)
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#ifdef RTOS
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#define BT_DRV_MUTUX_WAIT(evt) do{ \
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if (calib_thread_tid){ \
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osSignalClear(calib_thread_tid, 0x4); \
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evt = osSignalWait(0x4, 4000); \
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}\
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}while(0)
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#define BT_DRV_MUTUX_SET() do{ \
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if (calib_thread_tid){ \
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osSignalSet(calib_thread_tid, 0x4); \
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} \
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}while(0)
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#else
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typedef enum {
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osOK = 0, ///< function completed; no error or event occurred.
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osEventSignal = 0x08, ///< function completed; signal event occurred.
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osErrorOS = 0xFF, ///< unspecified RTOS error: run-time error but no other error message fits.
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os_status_reserved = 0x7FFFFFFF ///< prevent from enum down-size compiler optimization.
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} osStatus;
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typedef struct {
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osStatus status; ///< status code: event or error information
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} osEvent;
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#define BT_DRV_MUTUX_WAIT(evt) do{ \
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uint8_t i=16; \
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evt.status = osErrorOS; \
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do{ \
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if (calib_thread_tid){ \
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calib_thread_tid = false; \
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evt.status = osEventSignal; \
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break; \
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}else{ \
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btdrv_delay(500); \
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} \
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}while(i--);\
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}while(0)
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#define BT_DRV_MUTUX_SET() do{ \
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calib_thread_tid = true; \
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}while(0)
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#endif
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#define BT_DRV_CALIB_BTANA_CAPVAL_CALC_BOTTOM (50)
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#define BT_DRV_CALIB_BTANA_CAPVAL_CALC_TOP (200)
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#define BT_DRV_CALIB_BTANA_CAPVAL_MIN (20)
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#define BT_DRV_CALIB_BTANA_CAPVAL_MAX (255-BT_DRV_CALIB_BTANA_CAPVAL_MIN)
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#define BT_DRV_CALIB_BTANA_CAPVAL_STEP_HZ (200)
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#define BT_DRV_CALIB_RETRY_CNT (10)
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#define BT_DRV_CALIB_SKIP_RESULT_CNT (2)
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#define BT_DRV_CALIB_MDM_FREQ_REFERENCE (-12)
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#define BT_DRV_CALIB_MDM_FREQ_STEP_HZ (500)
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#define BT_DRV_CALIB_MDM_BIT_TO_FREQ(n, step) ((n)*(step))
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#define BT_DRV_CALIB_MDM_FREQ_TO_BIT(n, step) ((uint32_t)n/step)
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static int16_t calib_mdm_freq_reference = BT_DRV_CALIB_MDM_FREQ_REFERENCE;
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enum HAL_IOMUX_ISPI_ACCESS_T ispi_access;
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static void bt_drv_rfcal_timer_handler(void const *param);
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osTimerDef (BT_DRV_RFCAL_TIMER, bt_drv_rfcal_timer_handler);
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static osTimerId bt_drv_rfcal_timer = NULL;
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static void bt_drv_calib_stop_timer(void)
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{
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if (NULL != bt_drv_rfcal_timer)
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{
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osTimerStop(bt_drv_rfcal_timer);
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}
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}
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static void bt_drv_rfcal_timer_handler(void const *start)
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{
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static int start_nonsig_rx = 0;
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if (NULL == bt_drv_rfcal_timer)
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{
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bt_drv_rfcal_timer = osTimerCreate(osTimer(BT_DRV_RFCAL_TIMER), osTimerOnce, NULL);
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}
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osTimerStop(bt_drv_rfcal_timer);
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if (start_nonsig_rx || start) {
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start_nonsig_rx = 0;
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const uint8_t hci_cmd_hci_reset[] = {0x01, 0x03, 0x0c, 0x00};
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const uint8_t calib_hci_cmd_nonsig_rx_2dh1_pn9_t5[] = {
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0x01, 0x87, 0xfc, 0x1c, 0x01, 0xFA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x01, 0x01, 0x04, 0x00, 0x36, 0x00,
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0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff
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};
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/* start nonsig rx again */
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btdrv_SendData(hci_cmd_hci_reset, sizeof(hci_cmd_hci_reset));
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btdrv_delay(2);
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btdrv_SendData(calib_hci_cmd_nonsig_rx_2dh1_pn9_t5, sizeof(calib_hci_cmd_nonsig_rx_2dh1_pn9_t5));
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btdrv_delay(100);
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BT_DRV_TRACE(0,"bt_drv_cal start nonsig rx\n");
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BTDIGITAL_REG(0xd0210040) &= 0xff;
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BTDIGITAL_REG(0xd0210040) |= 0x55;
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osTimerStart(bt_drv_rfcal_timer, 1500);
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} else {
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start_nonsig_rx = 1;
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const uint8_t stop_nonsig_rx_cmd[] = {
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0x01, 0x87, 0xfc, 0x1c, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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};
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/* stop nonsig rx and let report cal result */
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btdrv_SendData(stop_nonsig_rx_cmd, sizeof(stop_nonsig_rx_cmd));
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btdrv_delay(2);
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BT_DRV_TRACE(0,"bt_drv_cal stop nonsig rx\n");
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osTimerStart(bt_drv_rfcal_timer, 300);
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}
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}
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void bt_drv_start_calib(void)
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{
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if (hal_get_chip_metal_id() < HAL_CHIP_METAL_ID_1)
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{
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const uint8_t calib_hci_cmd_nonsig_rx_2dh1_pn9[] = {
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0x01, 0x87, 0xfc, 0x14, 0x01, 0xFA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x01, 0x01, 0x04, 0x00, 0x36, 0x00
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};
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if (!calib_running){
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btdrv_SendData(calib_hci_cmd_nonsig_rx_2dh1_pn9, sizeof(calib_hci_cmd_nonsig_rx_2dh1_pn9));
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btdrv_delay(500);
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BTDIGITAL_REG(0xd0210040) &= 0xff;
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BTDIGITAL_REG(0xd0210040) |= 0x55;
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calib_running = true;
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}
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}
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else
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{
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bt_drv_rfcal_timer_handler((void*)1);
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calib_running = true;
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}
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}
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void bt_drv_stop_calib(void)
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{
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if (calib_running){
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btdrv_hci_reset();
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btdrv_delay(200);
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calib_running = false;
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}
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if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1)
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{
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bt_drv_calib_stop_timer();
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}
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}
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const uint8_t calib_hci_cmd_nonsig_tx_2dh1_pn9_t0[] = {
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0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x01, 0x01, 0x04, 0x04, 0x36, 0x00
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};
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const uint8_t calib_hci_cmd_nonsig_tx_2dh1_pn9_t1[] = {
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0x01, 0x87, 0xfc, 0x1c, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x01, 0x01, 0x04, 0x04, 0x36, 0x00,
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0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff
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};
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void bt_drv_check_calib(void)
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{
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const uint8_t* calib_hci_cmd_nonsig_tx_2dh1_pn9 = NULL;
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uint8_t len = 0;
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if (hal_get_chip_metal_id() < HAL_CHIP_METAL_ID_1)
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{
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calib_hci_cmd_nonsig_tx_2dh1_pn9 = calib_hci_cmd_nonsig_tx_2dh1_pn9_t0;
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len = sizeof(calib_hci_cmd_nonsig_tx_2dh1_pn9_t0);
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}
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else
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{
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calib_hci_cmd_nonsig_tx_2dh1_pn9 = calib_hci_cmd_nonsig_tx_2dh1_pn9_t1;
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len = sizeof(calib_hci_cmd_nonsig_tx_2dh1_pn9_t1);
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}
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btdrv_SendData(calib_hci_cmd_nonsig_tx_2dh1_pn9, len);
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btdrv_delay(3000);
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BTDIGITAL_REG(0xd0210040) &= 0xff;
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BTDIGITAL_REG(0xd0210040) |= 39;
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}
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static bool bt_drv_calib_capval_calc_run(uint16_t *capval_step_hz, int16_t estsw, uint8_t cdac)
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{
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bool nRet = false;
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int16_t estsw_diff;
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int16_t cdac_diff;
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if (!capval_calc.estsw_a &&
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!capval_calc.estsw_b){
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capval_calc.estsw_a = estsw;
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}else if (capval_calc.estsw_a &&
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!capval_calc.estsw_b){
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capval_calc.estsw_b = estsw;
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}
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if (!capval_calc.cdac_a &&
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!capval_calc.cdac_b){
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capval_calc.cdac_a = cdac;
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}else if (capval_calc.cdac_a &&
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!capval_calc.cdac_b){
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capval_calc.cdac_b = cdac;
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}
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if (capval_calc.estsw_a &&
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capval_calc.estsw_b &&
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capval_calc.cdac_a &&
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capval_calc.cdac_b){
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estsw_diff = ABS(capval_calc.estsw_b - capval_calc.estsw_a);
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cdac_diff = ABS((int16_t)(capval_calc.cdac_b) - (int16_t)(capval_calc.cdac_a));
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*capval_step_hz = estsw_diff*BT_DRV_CALIB_MDM_FREQ_STEP_HZ/cdac_diff;
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BT_DRV_TRACE(7,"%d/%d %d/%d estsw_diff:%d cdac_diff:%d capval_step_hz:%d",
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capval_calc.estsw_a,
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capval_calc.estsw_b,
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capval_calc.cdac_a,
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capval_calc.cdac_b,
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estsw_diff,
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cdac_diff,
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*capval_step_hz);
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nRet = true;
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}
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return nRet;
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}
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void bt_drv_calib_rxonly_porc(void)
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{
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osEvent evt;
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evt.status = os_status_reserved;
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/*[set tmx] */
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btdrv_write_rf_reg(0xb0,0x0f00); /* turn off tmx */
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bt_drv_start_calib();
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while(1){
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BT_DRV_MUTUX_WAIT(evt);
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if(evt.status != osEventSignal){
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break;
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}
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btdrv_delay(10);
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BT_DRV_TRACE(7,"result cnt:%d head:%d payload:%d estsw:%d esttpl:%d bit:%d est:%d", nonsig_tester_result.pkt_counters,
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nonsig_tester_result.head_errors,
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nonsig_tester_result.payload_errors,
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nonsig_tester_result.avg_estsw,
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nonsig_tester_result.avg_esttpl,
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nonsig_tester_result.payload_bit_errors,
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nonsig_tester_result.avg_estsw+nonsig_tester_result.avg_esttpl);
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};
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bt_drv_stop_calib();
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}
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int bt_drv_calib_result_porc(uint32_t *capval)
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{
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osEvent evt;
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uint16_t read_val = 0;
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uint8_t cdac = 0;
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uint8_t cnt = 0;
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uint8_t skip_cnt = 0;
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int diff = 0;
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int est = 0;
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uint8_t next_step = 0;
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uint16_t capval_step_hz = BT_DRV_CALIB_BTANA_CAPVAL_STEP_HZ;
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int nRet = -1;
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int chk_flag = 0;
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bool need_capval_calc = true;
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evt.status = os_status_reserved;
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/*[set to capval_min] */
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btdrv_read_rf_reg(0xE9, &read_val);
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cdac = BT_DRV_CALIB_BTANA_CAPVAL_CALC_BOTTOM;
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read_val = (read_val & 0xff00)|(cdac);;
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btdrv_write_rf_reg(0xE9,read_val);
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/*[set tmx] */
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btdrv_write_rf_reg(0xb0,0x0f00); /* turn off tmx */
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bt_drv_calib_capval_calc_reset();
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bt_drv_start_calib();
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check_again:
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BT_DRV_TRACE(0,"calib run !!!");
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do{
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calib_again:
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BT_DRV_MUTUX_WAIT(evt);
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if(evt.status != osEventSignal){
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nRet = -1;
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BT_DRV_TRACE(1,"evt:%d", evt.status);
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goto exit;
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}
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if (hal_get_chip_metal_id() < HAL_CHIP_METAL_ID_1)
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{
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BT_DRV_MUTUX_WAIT(evt);
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if(evt.status != osEventSignal)
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{
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nRet = -1;
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BT_DRV_TRACE(1,"evt:%d", evt.status);
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goto exit;
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}
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BT_DRV_MUTUX_WAIT(evt);
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if(evt.status != osEventSignal)
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{
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nRet = -1;
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BT_DRV_TRACE(1,"evt:%d", evt.status);
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goto exit;
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}
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}
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BT_DRV_TRACE(7,"result cnt:%d head:%d payload:%d estsw:%d esttpl:%d bit:%d est:%d", nonsig_tester_result.pkt_counters,
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nonsig_tester_result.head_errors,
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nonsig_tester_result.payload_errors,
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nonsig_tester_result.avg_estsw,
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nonsig_tester_result.avg_esttpl,
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nonsig_tester_result.payload_bit_errors,
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nonsig_tester_result.avg_estsw+nonsig_tester_result.avg_esttpl);
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if (nonsig_tester_result.head_errors>15){
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if (++skip_cnt>BT_DRV_CALIB_SKIP_RESULT_CNT)
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break;
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else
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goto calib_again;
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}
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skip_cnt = 0;
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btdrv_read_rf_reg(0xE9, &read_val);
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cdac = read_val & 0x00ff;
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est = nonsig_tester_result.avg_estsw;
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diff = est-calib_mdm_freq_reference;
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if (need_capval_calc){
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if (bt_drv_calib_capval_calc_run(&capval_step_hz, est, cdac)){
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need_capval_calc = false;
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}
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if (cdac == BT_DRV_CALIB_BTANA_CAPVAL_CALC_BOTTOM){
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cdac = BT_DRV_CALIB_BTANA_CAPVAL_CALC_TOP;
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read_val = (read_val & 0xff00)|(cdac);
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btdrv_write_rf_reg(0xE9,read_val);
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}
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goto calib_again;
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}
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if ((BT_DRV_CALIB_MDM_BIT_TO_FREQ(ABS(diff), BT_DRV_CALIB_MDM_FREQ_STEP_HZ) < 1500) && diff>0){
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if (!chk_flag){
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chk_flag = 1;
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cnt = 0;
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next_step = 2;
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goto check_again;
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}else if(chk_flag && cnt>4){
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break;
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}
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nRet = 0;
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break;
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}else if (next_step == 2){
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}else if (BT_DRV_CALIB_MDM_BIT_TO_FREQ(ABS(diff), BT_DRV_CALIB_MDM_FREQ_STEP_HZ) < 2500){
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next_step = 2;
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}else{
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next_step = BT_DRV_CALIB_MDM_BIT_TO_FREQ(ABS(diff), BT_DRV_CALIB_MDM_FREQ_STEP_HZ)/capval_step_hz;
|
|
if (next_step == 0){
|
|
next_step = 2;
|
|
}
|
|
if (next_step>200){
|
|
next_step = 200;
|
|
}
|
|
}
|
|
BT_DRV_TRACE(4,"diff:%d read_val:%x cdac:%d next_step:%d", diff,read_val, cdac, next_step);
|
|
if (est == calib_mdm_freq_reference){
|
|
if (!chk_flag){
|
|
chk_flag = 1;
|
|
cnt = 0;
|
|
next_step = 2;
|
|
goto check_again;
|
|
}else if(chk_flag && cnt>4){
|
|
break;
|
|
}
|
|
nRet = 0;
|
|
break;
|
|
}else if (est > calib_mdm_freq_reference){
|
|
if (cdac < (BT_DRV_CALIB_BTANA_CAPVAL_MIN+next_step)){
|
|
if (cdac == BT_DRV_CALIB_BTANA_CAPVAL_MIN)
|
|
break;
|
|
else
|
|
cdac = BT_DRV_CALIB_BTANA_CAPVAL_MIN;
|
|
}else{
|
|
cdac -= next_step;
|
|
}
|
|
read_val = (read_val & 0xff00)|(cdac);
|
|
|
|
BT_DRV_TRACE(2,"-----:%x cdac:%d", read_val, cdac);
|
|
}else if (est < calib_mdm_freq_reference){
|
|
if (cdac>(BT_DRV_CALIB_BTANA_CAPVAL_MAX-next_step)){
|
|
if (cdac == BT_DRV_CALIB_BTANA_CAPVAL_MAX)
|
|
break;
|
|
else
|
|
cdac = BT_DRV_CALIB_BTANA_CAPVAL_MAX;
|
|
}else{
|
|
cdac += next_step;
|
|
}
|
|
read_val = (read_val & 0xff00)|(cdac);
|
|
|
|
BT_DRV_TRACE(2,"+++++:%x cdac:%d", read_val, cdac);
|
|
}
|
|
|
|
btdrv_write_rf_reg(0xE9,read_val);
|
|
}while(cnt++<BT_DRV_CALIB_RETRY_CNT);
|
|
*capval = cdac;
|
|
exit:
|
|
bt_drv_stop_calib();
|
|
|
|
BT_DRV_TRACE(3,"capval:0x%x cnt:%d nRet:%d", *capval, cnt, nRet);
|
|
return nRet;
|
|
}
|
|
|
|
static unsigned int bt_drv_calib_rx(const unsigned char *data, unsigned int len)
|
|
{
|
|
const unsigned char nonsig_test_report[] = {0x04, 0x0e, 0x12};
|
|
struct dbg_nonsig_tester_result_tag *pResult = NULL;
|
|
|
|
hal_intersys_stop_recv(HAL_INTERSYS_ID_0);
|
|
|
|
// BT_DRV_TRACE(2,"%s len:%d", __func__, len);
|
|
BT_DRV_DUMP("%02x ", data, len);
|
|
if (0 == memcmp(data, nonsig_test_report, sizeof(nonsig_test_report))){
|
|
// BT_DRV_TRACE(0,"dbg_nonsig_tester_result !!!!!");
|
|
pResult = (struct dbg_nonsig_tester_result_tag *)(data + 7);
|
|
if (pResult->pkt_counters != 0)
|
|
{
|
|
memcpy(&nonsig_tester_result, pResult, sizeof(nonsig_tester_result));
|
|
BT_DRV_MUTUX_SET();
|
|
}
|
|
}
|
|
hal_intersys_start_recv(HAL_INTERSYS_ID_0);
|
|
|
|
return len;
|
|
}
|
|
|
|
void btdrv_tx(const unsigned char *data, unsigned int len);
|
|
void bt_drv_calib_open(void)
|
|
{
|
|
int ret = 0;
|
|
BT_DRV_TRACE(1,"%s", __func__);
|
|
#ifdef RTOS
|
|
if (calib_thread_tid == NULL){
|
|
calib_thread_tid = osThreadGetId();
|
|
}
|
|
#endif
|
|
|
|
ispi_access = hal_iomux_ispi_access_enable(HAL_IOMUX_ISPI_MCU_RF);
|
|
|
|
ret = hal_intersys_open(HAL_INTERSYS_ID_0, HAL_INTERSYS_MSG_HCI, bt_drv_calib_rx, btdrv_tx, false);
|
|
|
|
if (ret) {
|
|
BT_DRV_TRACE(0,"Failed to open intersys");
|
|
return;
|
|
}
|
|
hal_intersys_start_recv(HAL_INTERSYS_ID_0);
|
|
}
|
|
|
|
void bt_drv_calib_close(void)
|
|
{
|
|
btdrv_hci_reset();
|
|
btdrv_delay(200);
|
|
hal_intersys_close(HAL_INTERSYS_ID_0,HAL_INTERSYS_MSG_HCI);
|
|
}
|
|
|
|
#endif
|