130 lines
3.9 KiB
C
130 lines
3.9 KiB
C
/***************************************************************************
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*
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* Copyright 2015-2019 BES.
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* All rights reserved. All unpublished rights reserved.
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*
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* No part of this work may be used or reproduced in any form or by any
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* means, or stored in a database or retrieval system, without prior written
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* permission of BES.
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*
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* Use of this work is governed by a license granted by BES.
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* This work contains confidential and proprietary information of
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* BES. which is protected by copyright, trade secret,
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* trademark and other intellectual property rights.
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*
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****************************************************************************/
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#ifndef __REG_NORFLASHIP_V1_H__
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#define __REG_NORFLASHIP_V1_H__
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#include "plat_types.h"
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/* ip register */
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/* 0x0 */
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#define TX_CONFIG1_BASE 0x0
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#define TX_ADDR_SHIFT (8)
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#define TX_ADDR_MASK ((0xfffffff)<TX_ADDR_SHIFT)
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#define TX_CMD_SHIFT (0)
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#define TX_CMD_MASK ((0xFF)<TX_CMD_SHIFT)
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#define TX_ADDR_RW_SHIFT (16)
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#define TX_ADDR_RW_MASK ((0x1)<<TX_ADDR_RW_SHIFT)
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#define EXT_CMD_FLAG (0<<0)
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#define EXT_CMD_SHIFT (8)
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#define EXT_CMD_MASK (0xFF<<EXT_CMD_SHIFT)
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#define EXT_CMD_RX_MASK (1<<16)
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#define EXT_CMD_QUAD_MASK (1<<17)
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/* 0x4 */
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#define TX_CONFIG2_BASE 0x4
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#define TX_CONMOD_SHIFT (24)
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#define TX_CONMOD_MASK ((0x1)<<TX_CONMOD_SHIFT)
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#define TX_BLKSIZE_SHIFT (8)
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#define TX_BLKSIZE_MASK ((0x1ff)<<TX_BLKSIZE_SHIFT)
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#define TX_MODBIT_SHIFT (0)
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#define TX_MODBIT_MASK ((0xff)<<TX_MODBIT_SHIFT)
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/* 0x8 */
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#define TXDATA_BASE 0x8
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#define TXDATA_SHIFT (0)
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#define TXDATA_MASK ((0xff)<<TXDATA_SHIFT)
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/* 0xc */
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#define INT_STATUS_BASE 0xc
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#define RXFIFOCOUNT_SHIFT (4)
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#define RXFIFOCOUNT_MASK ((0xf)<<RXFIFOCOUNT_SHIFT)
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#define RXFIFOEMPTY_SHIFT (3)
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#define RXFIFOEMPTY_MASK ((0x1)<<RXFIFOEMPTY_SHIFT)
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#define TXFIFOFULL_SHIFT (2)
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#define TXFIFOFULL_MASK ((0x1)<<TXFIFOFULL_SHIFT)
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#define TXFIFOEMPTY_SHIFT (1)
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#define TXFIFOEMPTY_MASK ((0x1)<<TXFIFOEMPTY_SHIFT)
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#define BUSY_SHIFT (0)
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#define BUSY_MASK ((0x1)<<BUSY_SHIFT)
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/* 0x10 */
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#define RXDATA_BASE 0x10
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#define RXDATA_SHIFT (0)
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#define RXDATA_MASK ((0xffffffff)<<RXDATA_SHIFT)
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/* 0x14 */
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#define MODE1_CONFIG_BASE 0x14
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#define ADDRBYTE4_SHIFT (29)
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#define ADDRBYTE4_MASK ((0x1)<<ADDRBYTE4_SHIFT)
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#define RXCANCELEN_SHIFT (28)
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#define RXCANCELEN_MASK (0x1<<RXCANCELEN_SHIFT)
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#define WRAPTYPE_SHIFT (26)
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#define WRAPTYPE_MASK (0x3<<WRAPTYPE_SHIFT)
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#define WRAPEN_SHIFT (25)
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#define WRAPEN_MASK (0x1<<WRAPEN_SHIFT)
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#define FETCHEN_SHIFT (24)
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#define FETCHEN_MASK (0x1<<FETCHEN_SHIFT)
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#define DUMMYCLC_SHIFT (20)
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#define DUMMYCLC_MASK ((0xf)<<DUMMYCLC_SHIFT)
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#define DUMMYCLCEN_SHIFT (19)
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#define DUMMYCLCEN_MASK ((0x1)<<DUMMYCLCEN_SHIFT)
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#define NEG_PHASE_SHIFT (18)
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#define NEG_PHASE_MASK ((0x1)<<NEG_PHASE_SHIFT)
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#define POS_NEG_SHIFT (17)
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#define POS_NEG_MASK ((0x1)<<POS_NEG_SHIFT)
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#define CMDQUAD_SHIFT (16)
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#define CMDQUAD_MASK ((0x1)<<CMDQUAD_SHIFT)
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#define CLKDIV_SHIFT (8)
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#define CLKDIV_MASK ((0xff)<<CLKDIV_SHIFT)
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#define SAMDLY_SHIFT (4)
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#define SAMDLY_MASK ((0x7)<<SAMDLY_SHIFT)
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#define DUALMODE_SHIFT (3)
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#define DUALMODE_MASK ((0x1)<<DUALMODE_SHIFT)
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#define HOLDPIN_SHIFT (2)
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#define HOLDPIN_MASK ((0x1)<<HOLDPIN_SHIFT)
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#define WPRPIN_SHIFT (1)
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#define WPRPIN_MASK ((0x1)<<WPRPIN_SHIFT)
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#define QUADMODE_SHIFT (0)
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#define QUADMODE_MASK ((0x1)<<QUADMODE_SHIFT)
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/* 0x18 */
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#define FIFO_CONFIG_BASE 0x18
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#define TXFIFOCLR_SHIFT (1)
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#define TXFIFOCLR_MASK ((0x1)<<TXFIFOCLR_SHIFT)
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#define RXFIFOCLR_SHIFT (0)
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#define RXFIFOCLR_MASK ((0x1)<<RXFIFOCLR_SHIFT)
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/* 0x20 */
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#define MODE2_CONFIG_BASE 0x20
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#define DUALIOCMD_SHIFT (24)
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#define DUALIOCMD_MASK ((0xff)<<DUALIOCMD_SHIFT)
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#define RDCMD_SHIFT (16)
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#define RDCMD_MASK ((0xff)<<RDCMD_SHIFT)
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#define FRDCMD_SHIFT (8)
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#define FRDCMD_MASK ((0xff)<<FRDCMD_SHIFT)
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#define QRDCMDBIT_SHIFT (0)
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#define QRDCMDBIT_MASK ((0xff)<<QRDCMDBIT_SHIFT)
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/* 0x34 */
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#define PULL_UP_DOWN_CONFIG_BASE 0x34
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#define SPIRUEN_SHIFT (4)
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#define SPIRUEN_MASK ((0xf)<<SPIRUEN_SHIFT)
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#define SPIRDEN_SHIFT (0)
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#define SPIRDEN_MASK ((0xf)<<SPIRDEN_SHIFT)
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#endif
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