255 lines
6.1 KiB
C
255 lines
6.1 KiB
C
/***************************************************************************
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*
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* Copyright 2015-2019 BES.
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* All rights reserved. All unpublished rights reserved.
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*
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* No part of this work may be used or reproduced in any form or by any
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* means, or stored in a database or retrieval system, without prior written
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* permission of BES.
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*
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* Use of this work is governed by a license granted by BES.
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* This work contains confidential and proprietary information of
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* BES. which is protected by copyright, trade secret,
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* trademark and other intellectual property rights.
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*
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****************************************************************************/
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#include "cmsis.h"
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#include "hal_cache.h"
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#include "hal_cmu.h"
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#include "hal_location.h"
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#include "hal_psram.h"
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#include "hal_psramuhs.h"
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#if !defined(NOSTD) && defined(ACCURATE_DB_TO_FLOAT)
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#include <math.h>
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#endif
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#ifdef __ARMCC_VERSION
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#include "link_sym_armclang.h"
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#endif
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#ifdef BOOT_CODE_IN_RAM
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#define MUTEX_CODE_LOC BOOT_TEXT_SRAM_LOC
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#else
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#define MUTEX_CODE_LOC
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#endif
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extern uint32_t __got_info_start[];
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void BOOT_TEXT_FLASH_LOC GotBaseInit(void) {
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#ifndef __ARMCC_VERSION
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asm volatile("ldr r9, =__got_info_start");
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#endif
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}
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#ifndef __ARM_ARCH_ISA_ARM
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// -----------------------------------------------------------
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// Boot initialization
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// CAUTION: This function and all the functions it called must
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// NOT access global data/bss, for the global data/bss
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// is not available at that time.
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// -----------------------------------------------------------
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extern uint32_t __boot_sram_start_flash__[];
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extern uint32_t __boot_sram_end_flash__[];
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extern uint32_t __boot_sram_start__[];
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extern uint32_t __boot_bss_sram_start__[];
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extern uint32_t __boot_bss_sram_end__[];
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extern uint32_t __sram_text_data_start_flash__[];
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extern uint32_t __sram_text_data_end_flash__[];
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extern uint32_t __sram_text_data_start__[];
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extern uint32_t __sram_bss_start__[];
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extern uint32_t __sram_bss_end__[];
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extern uint32_t __fast_sram_text_data_start__[];
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extern uint32_t __fast_sram_text_data_end__[];
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extern uint32_t __fast_sram_text_data_start_flash__[];
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extern uint32_t __fast_sram_text_data_end_flash__[];
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void BOOT_TEXT_FLASH_LOC BootInit(void) {
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uint32_t *dst, *src;
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// Enable icache
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hal_cache_enable(HAL_CACHE_ID_I_CACHE);
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// Enable dcache
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hal_cache_enable(HAL_CACHE_ID_D_CACHE);
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// Enable write buffer
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hal_cache_writebuffer_enable(HAL_CACHE_ID_D_CACHE);
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// Enable write back
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hal_cache_writeback_enable(HAL_CACHE_ID_D_CACHE);
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// Init GOT base register
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GotBaseInit();
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// Init boot sections
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for (dst = __boot_sram_start__, src = __boot_sram_start_flash__;
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src < __boot_sram_end_flash__; dst++, src++) {
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*dst = *src;
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}
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for (dst = __boot_bss_sram_start__; dst < __boot_bss_sram_end__; dst++) {
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*dst = 0;
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}
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hal_cmu_setup();
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for (dst = __sram_text_data_start__, src = __sram_text_data_start_flash__;
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src < __sram_text_data_end_flash__; dst++, src++) {
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*dst = *src;
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}
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for (dst = __sram_bss_start__; dst < __sram_bss_end__; dst++) {
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*dst = 0;
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}
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for (dst = __fast_sram_text_data_start__,
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src = __fast_sram_text_data_start_flash__;
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src < __fast_sram_text_data_end_flash__; dst++, src++) {
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*dst = *src;
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}
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// Init psram
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#if defined(CHIP_HAS_PSRAM) && defined(PSRAM_ENABLE)
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hal_psram_init();
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#endif
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// Init psramuhs
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#if defined(CHIP_HAS_PSRAMUHS) && defined(PSRAMUHS_ENABLE)
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hal_cmu_dsp_clock_enable();
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hal_cmu_dsp_reset_clear();
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hal_psramuhs_init();
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#endif
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}
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#endif
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// -----------------------------------------------------------
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// Mutex flag
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// -----------------------------------------------------------
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int MUTEX_CODE_LOC set_bool_flag(bool *flag) {
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bool busy;
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do {
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busy = (bool)__LDREXB((unsigned char *)flag);
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if (busy) {
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__CLREX();
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return -1;
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}
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} while (__STREXB(true, (unsigned char *)flag));
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__DMB();
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return 0;
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}
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void MUTEX_CODE_LOC clear_bool_flag(bool *flag) {
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*flag = false;
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__DMB();
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}
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// -----------------------------------------------------------
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// Misc
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// -----------------------------------------------------------
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float db_to_float(float db) {
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float coef;
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#if !defined(NOSTD) && defined(ACCURATE_DB_TO_FLOAT)
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// The math lib will consume 4K+ bytes of space
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coef = powf(10, db / 20);
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#else
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static const float factor_m9db = 0.354813389234;
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static const float factor_m3db = 0.707945784384;
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static const float factor_m1db = 0.891250938134;
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static const float factor_m0p5db = 0.944060876286;
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static const float factor_m0p1db = 0.988553094657;
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coef = 1.0;
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if (db < 0) {
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while (1) {
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if (db <= -9.0) {
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db += 9.0;
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coef *= factor_m9db;
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} else if (db <= -3.0) {
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db += 3.0;
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coef *= factor_m3db;
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} else if (db <= -1.0) {
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db += 1.0;
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coef *= factor_m1db;
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} else if (db <= -0.5) {
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db += 0.5;
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coef *= factor_m0p5db;
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} else if (db <= -0.1 / 2) {
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db += 0.1;
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coef *= factor_m0p1db;
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} else {
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break;
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}
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}
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} else if (db > 0) {
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while (1) {
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if (db >= 9.0) {
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db -= 9.0;
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coef /= factor_m9db;
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} else if (db >= 3.0) {
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db -= 3.0;
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coef /= factor_m3db;
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} else if (db >= 1.0) {
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db -= 1.0;
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coef /= factor_m1db;
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} else if (db >= 0.5) {
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db -= 0.5;
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coef /= factor_m0p5db;
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} else if (db >= 0.1 / 2) {
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db -= 0.1;
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coef /= factor_m0p1db;
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} else {
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break;
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}
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}
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}
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#endif
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return coef;
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}
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uint32_t get_msb_pos(uint32_t val) {
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uint32_t lead_zero;
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lead_zero = __CLZ(val);
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return (lead_zero >= 32) ? 32 : 31 - lead_zero;
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}
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uint32_t get_lsb_pos(uint32_t val) { return __CLZ(__RBIT(val)); }
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uint32_t integer_sqrt(uint32_t val) {
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unsigned int msb;
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unsigned int x;
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unsigned int y;
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if (val == 0) {
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return 0;
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}
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for (msb = 31; msb > 0; msb--) {
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if (val & (1 << msb)) {
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break;
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}
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}
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x = ((1 << msb) + 1) / 2;
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while (1) {
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y = (x + val / x) / 2;
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if (y >= x) {
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break;
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}
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x = y;
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}
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return x;
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}
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uint32_t integer_sqrt_nearest(uint32_t val) {
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unsigned int s;
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s = integer_sqrt(val * 4);
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return (s + 1) / 2;
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}
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