95 lines
3.5 KiB
C
95 lines
3.5 KiB
C
/***************************************************************************
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*
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* Copyright 2015-2019 BES.
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* All rights reserved. All unpublished rights reserved.
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*
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* No part of this work may be used or reproduced in any form or by any
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* means, or stored in a database or retrieval system, without prior written
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* permission of BES.
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*
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* Use of this work is governed by a license granted by BES.
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* This work contains confidential and proprietary information of
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* BES. which is protected by copyright, trade secret,
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* trademark and other intellectual property rights.
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*
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****************************************************************************/
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#ifndef __REG_PWM_H__
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#define __REG_PWM_H__
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#include "plat_types.h"
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// PWM Registers
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struct PWM_T
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{
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__I uint32_t ID; // 0x000
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__IO uint32_t EN; // 0x004
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__IO uint32_t INV; // 0x008
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__IO uint32_t PHASE01; // 0x00C
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__IO uint32_t PHASE23; // 0x010
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__IO uint32_t LOAD01; // 0x014
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__IO uint32_t LOAD23; // 0x018
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__IO uint32_t TOGGLE01; // 0x01C
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__IO uint32_t TOGGLE23; // 0x020
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__IO uint32_t PHASEMOD; // 0x024
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};
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#define PWM_EN_0 (1 << 0)
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#define PWM_EN_1 (1 << 1)
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#define PWM_EN_2 (1 << 2)
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#define PWM_EN_3 (1 << 3)
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#define PWM_INV_0 (1 << 0)
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#define PWM_INV_1 (1 << 1)
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#define PWM_INV_2 (1 << 2)
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#define PWM_INV_3 (1 << 3)
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#define PWM_PHASE01_0(n) (((n) & 0xFFFF) << 0)
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#define PWM_PHASE01_0_MASK (0xFFFF << 0)
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#define PWM_PHASE01_0_SHIFT (0)
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#define PWM_PHASE01_1(n) (((n) & 0xFFFF) << 16)
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#define PWM_PHASE01_1_MASK (0xFFFF << 16)
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#define PWM_PHASE01_1_SHIFT (16)
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#define PWM_PHASE23_2(n) (((n) & 0xFFFF) << 0)
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#define PWM_PHASE23_2_MASK (0xFFFF << 0)
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#define PWM_PHASE23_2_SHIFT (0)
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#define PWM_PHASE23_3(n) (((n) & 0xFFFF) << 16)
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#define PWM_PHASE23_3_MASK (0xFFFF << 16)
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#define PWM_PHASE23_3_SHIFT (16)
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#define PWM_LOAD01_0(n) (((n) & 0xFFFF) << 0)
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#define PWM_LOAD01_0_MASK (0xFFFF << 0)
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#define PWM_LOAD01_0_SHIFT (0)
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#define PWM_LOAD01_1(n) (((n) & 0xFFFF) << 16)
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#define PWM_LOAD01_1_MASK (0xFFFF << 16)
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#define PWM_LOAD01_1_SHIFT (16)
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#define PWM_LOAD23_2(n) (((n) & 0xFFFF) << 0)
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#define PWM_LOAD23_2_MASK (0xFFFF << 0)
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#define PWM_LOAD23_2_SHIFT (0)
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#define PWM_LOAD23_3(n) (((n) & 0xFFFF) << 16)
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#define PWM_LOAD23_3_MASK (0xFFFF << 16)
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#define PWM_LOAD23_3_SHIFT (16)
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#define PWM_TOGGLE01_0(n) (((n) & 0xFFFF) << 0)
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#define PWM_TOGGLE01_0_MASK (0xFFFF << 0)
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#define PWM_TOGGLE01_0_SHIFT (0)
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#define PWM_TOGGLE01_1(n) (((n) & 0xFFFF) << 16)
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#define PWM_TOGGLE01_1_MASK (0xFFFF << 16)
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#define PWM_TOGGLE01_1_SHIFT (16)
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#define PWM_TOGGLE23_2(n) (((n) & 0xFFFF) << 0)
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#define PWM_TOGGLE23_2_MASK (0xFFFF << 0)
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#define PWM_TOGGLE23_2_SHIFT (0)
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#define PWM_TOGGLE23_3(n) (((n) & 0xFFFF) << 16)
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#define PWM_TOGGLE23_3_MASK (0xFFFF << 16)
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#define PWM_TOGGLE23_3_SHIFT (16)
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#define PWM_PHASEMOD_0 (1 << 0)
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#define PWM_PHASEMOD_1 (1 << 1)
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#define PWM_PHASEMOD_2 (1 << 2)
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#define PWM_PHASEMOD_3 (1 << 3)
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#endif
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