186 lines
7.8 KiB
C
186 lines
7.8 KiB
C
/***************************************************************************
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*
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* Copyright 2015-2019 BES.
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* All rights reserved. All unpublished rights reserved.
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*
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* No part of this work may be used or reproduced in any form or by any
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* means, or stored in a database or retrieval system, without prior written
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* permission of BES.
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*
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* Use of this work is governed by a license granted by BES.
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* This work contains confidential and proprietary information of
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* BES. which is protected by copyright, trade secret,
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* trademark and other intellectual property rights.
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*
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****************************************************************************/
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#ifndef NORFLASH_HAL_H
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#define NORFLASH_HAL_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "plat_types.h"
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#include "hal_cmu.h"
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#define HAL_NORFLASH_DEVICE_ID_LEN 3
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#define HAL_NORFLASH_UNIQUE_ID_LEN 16
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enum HAL_NORFLASH_ID_T {
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HAL_NORFLASH_ID_0 = 0,
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HAL_NORFLASH_ID_NUM,
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};
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enum HAL_NORFLASH_RET_T {
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HAL_NORFLASH_OK,
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HAL_NORFLASH_SUSPENDED,
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HAL_NORFLASH_ERR,
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HAL_NORFLASH_BAD_ID,
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HAL_NORFLASH_BAD_DIV,
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HAL_NORFLASH_BAD_CALIB_ID,
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HAL_NORFLASH_BAD_CFG,
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HAL_NORFLASH_BAD_OP,
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HAL_NORFLASH_BAD_CALIB_MAGIC,
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HAL_NORFLASH_BAD_ADDR,
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HAL_NORFLASH_BAD_LEN,
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HAL_NORFLASH_NOT_OPENED,
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HAL_NORFLASH_CFG_NULL,
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};
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enum HAL_NORFLASH_SPEED {
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HAL_NORFLASH_SPEED_13M = 13000000,
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HAL_NORFLASH_SPEED_26M = 26000000,
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HAL_NORFLASH_SPEED_52M = 52000000,
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HAL_NORFLASH_SPEED_78M = 78000000,
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HAL_NORFLASH_SPEED_104M = 104000000,
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HAL_NORFLASH_SPEED_130M = 130000000,
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HAL_NORFLASH_SPEED_156M = 156000000,
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HAL_NORFLASH_SPEED_182M = 182000000,
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HAL_NORFLASH_SPEED_208M = 208000000,
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HAL_NORFLASH_SPEED_234M = 234000000,
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};
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enum HAL_NORFLASH_OP_MODE {
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// Different groups can be used together, different flash-device may support different option(s)
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// (1) basic read mode
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/* standard spi mode */
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HAL_NORFLASH_OP_MODE_STAND_SPI = 0x1,
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/* fast spi mode*/
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HAL_NORFLASH_OP_MODE_FAST_SPI = 0x2,
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/* dual mode */
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HAL_NORFLASH_OP_MODE_DUAL_OUTPUT = 0x4,
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/* dual mode */
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HAL_NORFLASH_OP_MODE_DUAL_IO = 0x8,
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/* quad mode */
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HAL_NORFLASH_OP_MODE_QUAD_OUTPUT = 0x10,
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/* quad mode */
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HAL_NORFLASH_OP_MODE_QUAD_IO = 0x20,
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// (2) extend read mode
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// read accelerate (no cmd bettween read operation) :
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// may need Dual or Quad Mode
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HAL_NORFLASH_OP_MODE_CONTINUOUS_READ = 0x40,
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// read high performance mode
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HAL_NORFLASH_OP_MODE_HIGH_PERFORMANCE = 0x80,
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// read wrap mode
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HAL_NORFLASH_OP_MODE_READ_WRAP = 0x100,
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// (3) program mode.
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// page program mode
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HAL_NORFLASH_OP_MODE_PAGE_PROGRAM = 0x200,
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// dual program mode
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HAL_NORFLASH_OP_MODE_DUAL_PAGE_PROGRAM = 0x400,
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// quad program mode
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HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM = 0x800,
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// (4) advanced features
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// suspend and resume
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HAL_NORFLASH_OP_MODE_SUSPEND = 0x1000,
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// erase in standard spi mode
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HAL_NORFLASH_OP_MODE_ERASE_IN_STD = 0x2000,
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HAL_NORFLASH_OP_MODE_RESERVED = 0xFFFFFFFF,
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};
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struct HAL_NORFLASH_CONFIG_T {
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uint32_t source_clk;
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uint32_t speed;
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enum HAL_NORFLASH_OP_MODE mode;
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/* internal use : can be config if need to (useful for rom) */
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uint8_t override_config:1;
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uint8_t neg_phase:1;
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uint8_t pos_neg:1;
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uint8_t cmdquad:1;
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uint8_t samdly:3;
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uint8_t div; /* least 2 */
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uint8_t dualmode:1;
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uint8_t holdpin:1;
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uint8_t wprpin:1;
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uint8_t quadmode:1;
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uint8_t spiruen:3;
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uint8_t spirden:3;
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uint8_t dualiocmd;
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uint8_t rdcmd;
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uint8_t frdcmd;
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uint8_t qrdcmd; /* quad io cmd */
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#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402)
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uint8_t dec_enable; /* 1: enable decoder, 0: disable decoder */
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uint8_t dec_idx; /* decoder key index ,from 0 to 3 */
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uint32_t dec_addr; /* start address where to decode */
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uint32_t dec_size; /* bytes number will be decoded */
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#endif
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};
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/* hal api */
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void hal_norflash_set_freq(enum HAL_CMU_FREQ_T freq);
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const struct HAL_NORFLASH_CONFIG_T *hal_norflash_get_init_config(void);
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enum HAL_NORFLASH_RET_T hal_norflash_init(void);
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enum HAL_NORFLASH_RET_T hal_norflash_deinit(void);
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enum HAL_NORFLASH_RET_T hal_norflash_open(enum HAL_NORFLASH_ID_T id, const struct HAL_NORFLASH_CONFIG_T *cfg);
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enum HAL_NORFLASH_RET_T hal_norflash_reopen(enum HAL_NORFLASH_ID_T id, const struct HAL_NORFLASH_CONFIG_T *cfg);
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enum HAL_NORFLASH_RET_T hal_norflash_apply_config(enum HAL_NORFLASH_ID_T id, const struct HAL_NORFLASH_CONFIG_T *cfg, uint32_t timing_idx);
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uint32_t hal_norflash_get_timing_index(enum HAL_NORFLASH_ID_T id);
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void hal_norflash_show_calib_result(void);
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enum HAL_CMU_FREQ_T hal_norflash_clk_to_cmu_freq(uint32_t clk);
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enum HAL_NORFLASH_RET_T hal_norflash_get_size(enum HAL_NORFLASH_ID_T id, uint32_t *total_size, uint32_t *block_size, uint32_t *sector_size, uint32_t *page_size);
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enum HAL_NORFLASH_RET_T hal_norflash_get_boundary(enum HAL_NORFLASH_ID_T id, uint32_t address, uint32_t* block_boundary, uint32_t* sector_boundary);
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enum HAL_NORFLASH_RET_T hal_norflash_get_id(enum HAL_NORFLASH_ID_T id, uint8_t *value, uint32_t len);
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enum HAL_NORFLASH_RET_T hal_norflash_get_unique_id(enum HAL_NORFLASH_ID_T id, uint8_t *value, uint32_t len);
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enum HAL_NORFLASH_RET_T hal_norflash_enable_protection(enum HAL_NORFLASH_ID_T id);
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enum HAL_NORFLASH_RET_T hal_norflash_disable_protection(enum HAL_NORFLASH_ID_T id);
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enum HAL_NORFLASH_RET_T hal_norflash_erase_chip(enum HAL_NORFLASH_ID_T id);
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enum HAL_NORFLASH_RET_T hal_norflash_erase_suspend(enum HAL_NORFLASH_ID_T id, uint32_t start_address, uint32_t len, int suspend);
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enum HAL_NORFLASH_RET_T hal_norflash_erase(enum HAL_NORFLASH_ID_T id, uint32_t start_address, uint32_t len);
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enum HAL_NORFLASH_RET_T hal_norflash_erase_resume(enum HAL_NORFLASH_ID_T id, int suspend);
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enum HAL_NORFLASH_RET_T hal_norflash_write_suspend(enum HAL_NORFLASH_ID_T id, uint32_t start_address, const uint8_t *buffer, uint32_t len, int suspend);
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enum HAL_NORFLASH_RET_T hal_norflash_write(enum HAL_NORFLASH_ID_T id, uint32_t start_address, const uint8_t *buffer, uint32_t len);
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enum HAL_NORFLASH_RET_T hal_norflash_write_resume(enum HAL_NORFLASH_ID_T id, int suspend);
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enum HAL_NORFLASH_RET_T hal_norflash_suspend_check_irq(enum HAL_NORFLASH_ID_T id, uint32_t irq_num);
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enum HAL_NORFLASH_RET_T hal_norflash_read(enum HAL_NORFLASH_ID_T id, uint32_t start_address, uint8_t *buffer, uint32_t len);
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enum HAL_NORFLASH_RET_T hal_norflash_close(enum HAL_NORFLASH_ID_T id);
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void hal_norflash_sleep(enum HAL_NORFLASH_ID_T id);
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void hal_norflash_wakeup(enum HAL_NORFLASH_ID_T id);
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int hal_norflash_busy(void);
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uint32_t hal_norflash_get_flash_total_size(enum HAL_NORFLASH_ID_T id);
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int hal_norflash_opened(enum HAL_NORFLASH_ID_T id);
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enum HAL_NORFLASH_RET_T hal_norflash_get_open_state(enum HAL_NORFLASH_ID_T id);
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enum HAL_NORFLASH_RET_T hal_norflash_security_register_lock(enum HAL_NORFLASH_ID_T id, uint32_t start_address, uint32_t len);
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enum HAL_NORFLASH_RET_T hal_norflash_security_register_erase(enum HAL_NORFLASH_ID_T id, uint32_t start_address, uint32_t len);
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enum HAL_NORFLASH_RET_T hal_norflash_security_register_write(enum HAL_NORFLASH_ID_T id, uint32_t start_address, const uint8_t *buffer, uint32_t len);
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enum HAL_NORFLASH_RET_T hal_norflash_security_register_read(enum HAL_NORFLASH_ID_T id, uint32_t start_address, uint8_t *buffer, uint32_t len);
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enum HAL_NORFLASH_RET_T hal_norflash_enable_remap(enum HAL_NORFLASH_ID_T id, uint32_t addr, uint32_t len, uint32_t offset);
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enum HAL_NORFLASH_RET_T hal_norflash_disable_remap(enum HAL_NORFLASH_ID_T id);
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enum HAL_NORFLASH_RET_T hal_norflash_re_enable_remap(enum HAL_NORFLASH_ID_T id);
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int hal_norflash_get_remap_status(enum HAL_NORFLASH_ID_T id);
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#ifdef __cplusplus
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}
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#endif
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#endif /* NORFLASH_HAL_H */
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