358 lines
14 KiB
C
358 lines
14 KiB
C
/***************************************************************************
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*
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* Copyright 2015-2019 BES.
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* All rights reserved. All unpublished rights reserved.
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*
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* No part of this work may be used or reproduced in any form or by any
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* means, or stored in a database or retrieval system, without prior written
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* permission of BES.
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*
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* Use of this work is governed by a license granted by BES.
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* This work contains confidential and proprietary information of
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* BES. which is protected by copyright, trade secret,
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* trademark and other intellectual property rights.
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*
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****************************************************************************/
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#include "tgt_hardware.h"
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#include "drc.h"
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#include "fir_process.h"
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#include "iir_process.h"
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#include "limiter.h"
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#include "spectrum_fix.h"
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const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM] = {
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#if (CFG_HW_PLW_NUM > 0)
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{HAL_IOMUX_PIN_LED2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_PULLUP_ENABLE},
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{HAL_IOMUX_PIN_LED1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_PULLUP_ENABLE},
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#endif
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};
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#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__
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const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_ibrt_indication_pinmux_pwl[3] = {
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{HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_PULLUP_ENABLE},
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{HAL_IOMUX_PIN_LED1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VBAT,
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HAL_IOMUX_PIN_PULLUP_ENABLE},
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{HAL_IOMUX_PIN_LED2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VBAT,
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HAL_IOMUX_PIN_PULLUP_ENABLE},
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};
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#endif
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#ifdef __KNOWLES
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const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_pinmux_uart[2] = {
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{HAL_IOMUX_PIN_P2_2, HAL_IOMUX_FUNC_UART2_RX, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_NOPULL},
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{HAL_IOMUX_PIN_P2_3, HAL_IOMUX_FUNC_UART2_TX, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_NOPULL},
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};
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#endif
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// adckey define
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const uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER] = {
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#if (CFG_HW_ADCKEY_NUMBER > 0)
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HAL_KEY_CODE_FN9, HAL_KEY_CODE_FN8, HAL_KEY_CODE_FN7,
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HAL_KEY_CODE_FN6, HAL_KEY_CODE_FN5, HAL_KEY_CODE_FN4,
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HAL_KEY_CODE_FN3, HAL_KEY_CODE_FN2, HAL_KEY_CODE_FN1,
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#endif
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};
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// gpiokey define
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#define CFG_HW_GPIOKEY_DOWN_LEVEL (0)
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#define CFG_HW_GPIOKEY_UP_LEVEL (1)
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const struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM] = {
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/*
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#if (CFG_HW_GPIOKEY_NUM > 0)
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#ifdef BES_AUDIO_DEV_Main_Board_9v0
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{HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P0_3, HAL_IOMUX_FUNC_AS_GPIO,
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HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
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{HAL_KEY_CODE_FN2,{HAL_IOMUX_PIN_P0_0, HAL_IOMUX_FUNC_AS_GPIO,
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HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
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{HAL_KEY_CODE_FN3,{HAL_IOMUX_PIN_P0_1, HAL_IOMUX_FUNC_AS_GPIO,
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HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
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{HAL_KEY_CODE_FN4,{HAL_IOMUX_PIN_P0_2, HAL_IOMUX_FUNC_AS_GPIO,
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HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
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//{HAL_KEY_CODE_FN5,{HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_AS_GPIO,
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HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
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// {HAL_KEY_CODE_FN6,{HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_AS_GPIO,
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HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #else #ifndef
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TPORTS_KEY_COEXIST {HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P1_3,
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HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_PULLUP_ENABLE}}, {HAL_KEY_CODE_FN2,{HAL_IOMUX_PIN_P1_0,
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HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_PULLUP_ENABLE}},
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// {HAL_KEY_CODE_FN3,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,
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HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
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{HAL_KEY_CODE_FN15,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,
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HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #else
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{HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO,
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HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
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{HAL_KEY_CODE_FN15,{HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_AS_GPIO,
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HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #endif #endif
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#ifdef IS_MULTI_AI_ENABLED
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//{HAL_KEY_CODE_FN13,{HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO,
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HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
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//{HAL_KEY_CODE_FN14,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,
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HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #endif #endif
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*/
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{HAL_KEY_CODE_FN1,
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{HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_PULLUP_ENABLE}},
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};
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// bt config
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const char *BT_LOCAL_NAME = TO_STRING(BT_DEV_NAME) "\0";
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const char *BLE_DEFAULT_NAME = "BES_BLE";
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uint8_t ble_addr[6] = {
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#ifdef BLE_DEV_ADDR
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BLE_DEV_ADDR
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#else
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0xBE, 0x99, 0x34, 0x45,
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0x56, 0x67
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#endif
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};
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uint8_t bt_addr[6] = {
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#ifdef BT_DEV_ADDR
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BT_DEV_ADDR
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#else
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0x1e, 0x57, 0x34, 0x45,
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0x56, 0x67
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#endif
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};
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// audio config
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// freq bands range {[0k:2.5K], [2.5k:5K], [5k:7.5K], [7.5K:10K], [10K:12.5K],
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// [12.5K:15K], [15K:17.5K], [17.5K:20K]} gain range -12~+12
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const int8_t cfg_aud_eq_sbc_band_settings[CFG_HW_AUD_EQ_NUM_BANDS] = {
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0, 0, 0, 0, 0, 0, 0, 0};
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#define TX_PA_GAIN CODEC_TX_PA_GAIN_DEFAULT
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const struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY] = {
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{TX_PA_GAIN, 0x03, -21}, {TX_PA_GAIN, 0x03, -99},
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{TX_PA_GAIN, 0x03, -45}, {TX_PA_GAIN, 0x03, -42},
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{TX_PA_GAIN, 0x03, -39}, {TX_PA_GAIN, 0x03, -36},
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{TX_PA_GAIN, 0x03, -33}, {TX_PA_GAIN, 0x03, -30},
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{TX_PA_GAIN, 0x03, -27}, {TX_PA_GAIN, 0x03, -24},
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{TX_PA_GAIN, 0x03, -21}, {TX_PA_GAIN, 0x03, -18},
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{TX_PA_GAIN, 0x03, -15}, {TX_PA_GAIN, 0x03, -12},
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{TX_PA_GAIN, 0x03, -9}, {TX_PA_GAIN, 0x03, -6},
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{TX_PA_GAIN, 0x03, -3}, {TX_PA_GAIN, 0x03, 0}, // 0dBm
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};
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#if SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 2
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#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \
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(AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC2 | \
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AUD_VMIC_MAP_VMIC3)
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#elif SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 3
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#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \
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(AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1 | AUD_CHANNEL_MAP_CH4 | \
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AUD_VMIC_MAP_VMIC1)
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#else
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#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \
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(AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC3)
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#endif
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#define CFG_HW_AUD_INPUT_PATH_LINEIN_DEV \
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(AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)
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#ifdef VOICE_DETECTOR_EN
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#define CFG_HW_AUD_INPUT_PATH_VADMIC_DEV \
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(AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC1)
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#else
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#define CFG_HW_AUD_INPUT_PATH_ASRMIC_DEV \
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(AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC3)
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#endif
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const struct AUD_IO_PATH_CFG_T
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cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM] = {
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#if defined(SPEECH_TX_AEC_CODEC_REF)
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// NOTE: If enable Ch5 and CH6, need to add channel_num when setup
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// audioflinger stream
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{
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AUD_INPUT_PATH_MAINMIC,
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CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV | AUD_CHANNEL_MAP_CH4,
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},
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#else
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{
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AUD_INPUT_PATH_MAINMIC,
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CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV,
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},
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#endif
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{
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AUD_INPUT_PATH_LINEIN,
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CFG_HW_AUD_INPUT_PATH_LINEIN_DEV,
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},
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#ifdef VOICE_DETECTOR_EN
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{
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AUD_INPUT_PATH_VADMIC,
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CFG_HW_AUD_INPUT_PATH_VADMIC_DEV,
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},
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#else
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{
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AUD_INPUT_PATH_ASRMIC,
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CFG_HW_AUD_INPUT_PATH_ASRMIC_DEV,
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},
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#endif
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};
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const struct HAL_IOMUX_PIN_FUNCTION_MAP MuteOutPwl = {
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HAL_IOMUX_PIN_P1_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_NOPULL};
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const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg = {
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HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_PULLUP_ENABLE};
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const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg = {
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HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_PULLUP_ENABLE};
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const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg =
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{HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_PULLUP_ENABLE};
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const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_tws_channel_cfg = {
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HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_PULLUP_ENABLE // HAL_IOMUX_PIN_P1_5
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// 500:HAL_IOMUX_PIN_P2_5
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};
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/*
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const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_INT ={
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HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_PULLUP_ENABLE
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};
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*/
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const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SDA = {
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HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_PULLUP_ENABLE};
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const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SCL = {
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HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
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HAL_IOMUX_PIN_PULLUP_ENABLE};
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bool tgt_tws_get_channel_is_right(void) {
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#ifdef __FIXED_TWS_EAR_SIDE__
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return TWS_EAR_SIDE_ROLE;
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#else
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return hal_gpio_pin_get_val((enum HAL_GPIO_PIN_T)cfg_hw_tws_channel_cfg.pin);
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#endif
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}
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const IIR_CFG_T audio_eq_sw_iir_cfg = {
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.gain0 = 0,
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.gain1 = 0,
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.num = 5,
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.param = {{IIR_TYPE_PEAK, .0, 200, 2},
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{IIR_TYPE_PEAK, .0, 600, 2},
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{IIR_TYPE_PEAK, .0, 2000.0, 2},
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{IIR_TYPE_PEAK, .0, 6000.0, 2},
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{IIR_TYPE_PEAK, .0, 12000.0, 2}}};
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const IIR_CFG_T *const audio_eq_sw_iir_cfg_list[EQ_SW_IIR_LIST_NUM] = {
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&audio_eq_sw_iir_cfg,
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};
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const FIR_CFG_T audio_eq_hw_fir_cfg_44p1k = {.gain = 0.0f,
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.len = 384,
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.coef = {
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(1 << 23) - 1,
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}};
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const FIR_CFG_T audio_eq_hw_fir_cfg_48k = {.gain = 0.0f,
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.len = 384,
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.coef = {
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(1 << 23) - 1,
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}};
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const FIR_CFG_T audio_eq_hw_fir_cfg_96k = {.gain = 0.0f,
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.len = 384,
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.coef = {
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(1 << 23) - 1,
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}};
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const FIR_CFG_T *const audio_eq_hw_fir_cfg_list[EQ_HW_FIR_LIST_NUM] = {
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&audio_eq_hw_fir_cfg_44p1k,
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&audio_eq_hw_fir_cfg_48k,
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&audio_eq_hw_fir_cfg_96k,
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};
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// hardware dac iir eq
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const IIR_CFG_T audio_eq_hw_dac_iir_cfg = {.gain0 = 0,
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.gain1 = 0,
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.num = 8,
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.param = {
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{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
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{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
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{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
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{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
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{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
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{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
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{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
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{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
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}};
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const IIR_CFG_T *const POSSIBLY_UNUSED
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audio_eq_hw_dac_iir_cfg_list[EQ_HW_DAC_IIR_LIST_NUM] = {
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&audio_eq_hw_dac_iir_cfg,
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};
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// hardware dac iir eq
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const IIR_CFG_T audio_eq_hw_adc_iir_adc_cfg = {
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.gain0 = 0,
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.gain1 = 0,
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.num = 1,
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.param = {
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{IIR_TYPE_PEAK, 0.0, 1000.0, 0.7},
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}};
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const IIR_CFG_T *const POSSIBLY_UNUSED
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audio_eq_hw_adc_iir_cfg_list[EQ_HW_ADC_IIR_LIST_NUM] = {
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&audio_eq_hw_adc_iir_adc_cfg,
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};
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// hardware iir eq
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const IIR_CFG_T audio_eq_hw_iir_cfg = {.gain0 = 0,
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.gain1 = 0,
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.num = 8,
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.param = {
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{IIR_TYPE_PEAK, -10.1, 100.0, 7},
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{IIR_TYPE_PEAK, -10.1, 400.0, 7},
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{IIR_TYPE_PEAK, -10.1, 700.0, 7},
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{IIR_TYPE_PEAK, -10.1, 1000.0, 7},
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{IIR_TYPE_PEAK, -10.1, 3000.0, 7},
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{IIR_TYPE_PEAK, -10.1, 5000.0, 7},
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{IIR_TYPE_PEAK, -10.1, 7000.0, 7},
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{IIR_TYPE_PEAK, -10.1, 9000.0, 7},
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}};
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const IIR_CFG_T *const POSSIBLY_UNUSED
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audio_eq_hw_iir_cfg_list[EQ_HW_IIR_LIST_NUM] = {
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&audio_eq_hw_iir_cfg,
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};
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const DrcConfig audio_drc_cfg = {.knee = 3,
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.filter_type = {14, -1},
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.band_num = 2,
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.look_ahead_time = 10,
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.band_settings = {
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{-20, 0, 2, 3, 3000, 1},
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{-20, 0, 2, 3, 3000, 1},
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}};
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const LimiterConfig audio_drc2_cfg = {
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.knee = 2,
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.look_ahead_time = 10,
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.threshold = -20,
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.makeup_gain = 19,
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.ratio = 1000,
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.attack_time = 3,
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.release_time = 3000,
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};
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const SpectrumFixConfig audio_spectrum_cfg = {
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.freq_num = 9,
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.freq_list = {200, 400, 600, 800, 1000, 1200, 1400, 1600, 1800},
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};
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