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base: rudism:daaaadc56d53e82a314e5ac0d3a125910047183a
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rudism:main
rudism:custom-buttons
rudism:anc-rebased
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compare: rudism:c7372d21d2a96d1147053b3b4517fc1dd12b60fa
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15 Commits
daaaadc56d ... c7372d21d2

Author SHA1 Message Date
Ben V. Brown c7372d21d2
Turn off resample for now (to avoid 56k profile) 2023-09-23 13:58:34 -05:00
Ben V. Brown 16cfcb1002
Port fb tuning values 2023-09-23 13:58:34 -05:00
Ben V. Brown 8e91ed7282
Update decoder 2023-09-23 13:58:34 -05:00
Ben V. Brown 9a747bdaad
Port some rough anc numbers from firmware dump 2023-09-23 13:58:34 -05:00
Ben V. Brown 94e2f92c29
Scratching debug tool for anc poking 2023-09-23 13:58:34 -05:00
Ben V. Brown 64e193ad66
Note WNR is off 2023-09-23 13:58:34 -05:00
Ben V. Brown 33fdf13003
Try higher gain for anc 2023-09-23 13:58:33 -05:00
Ben V. Brown 396ea8e2a7
Update target.mk 2023-09-23 13:58:33 -05:00
Ben V. Brown c5570b96ca
Update target.mk 2023-09-23 13:58:33 -05:00
Ben V. Brown 037cee323a
Update analog_best2300p.c 2023-09-23 13:58:33 -05:00
Ben V. Brown 0a82336258
Add logging to anc init 2023-09-23 13:58:33 -05:00
Ben V. Brown 5678f70284
Cant do inline comments on makefile target config 2023-09-23 13:58:33 -05:00
Ben V. Brown 399f466954
Make warning on no anc VMIC 2023-09-23 13:58:33 -05:00
Ben V. Brown 9c14484f09
Edit config for mics 2023-09-23 13:58:33 -05:00
Ben V. Brown 97c2a54186
Annotate config options 2023-09-23 13:58:29 -05:00
9 changed files with 638 additions and 358 deletions
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42
apps/anc/src/app_anc.c
View File

@ -47,8 +47,8 @@
#endif #endif
#include "co_math.h" #include "co_math.h"
//#define ANC_MODE_SWITCH_WITHOUT_FADE //Comment this line if you need fade // #define ANC_MODE_SWITCH_WITHOUT_FADE //Comment this line if you need fade
// function between anc mode // function between anc mode
#ifndef _ANC_FADE_STACK_SIZE #ifndef _ANC_FADE_STACK_SIZE
#define _ANC_FADE_STACK_SIZE (1 * 1024) #define _ANC_FADE_STACK_SIZE (1 * 1024)
@ -1060,31 +1060,41 @@ void app_anc_open_anc(void) {
capture_rate = anc_sample_rate[AUD_STREAM_CAPTURE]; capture_rate = anc_sample_rate[AUD_STREAM_CAPTURE];
pmu_anc_config(1); pmu_anc_config(1);
int result = 0;
#ifdef ANC_FF_ENABLED #ifdef ANC_FF_ENABLED
af_anc_open(ANC_FEEDFORWARD, playback_rate, capture_rate, handler); result = af_anc_open(ANC_FEEDFORWARD, playback_rate, capture_rate, handler);
anc_open(ANC_FEEDFORWARD); TRACE(2, "af_anc_open %s %d -> %d\n", __FUNCTION__, __LINE__, result);
anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx, result = anc_open(ANC_FEEDFORWARD);
ANC_FEEDFORWARD, ANC_GAIN_DELAY); TRACE(2, "anc_open %s %d -> %d\n", __FUNCTION__, __LINE__, result);
result = anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,
ANC_FEEDFORWARD, ANC_GAIN_DELAY);
TRACE(2, "anc_select_coef %s %d -> %d\n", __FUNCTION__, __LINE__, result);
#endif #endif
#ifdef ANC_FB_ENABLED #ifdef ANC_FB_ENABLED
af_anc_open(ANC_FEEDBACK, playback_rate, capture_rate, handler); result = af_anc_open(ANC_FEEDBACK, playback_rate, capture_rate, handler);
anc_open(ANC_FEEDBACK); TRACE(2, "anc_open %s %d -> %d\n", __FUNCTION__, __LINE__, result);
anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx, result = anc_open(ANC_FEEDBACK);
ANC_FEEDBACK, ANC_GAIN_DELAY); TRACE(2, "anc_open %s %d -> %d\n", __FUNCTION__, __LINE__, result);
result = anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,
ANC_FEEDBACK, ANC_GAIN_DELAY);
TRACE(2, "anc_select_coef %s %d -> %d\n", __FUNCTION__, __LINE__, result);
#endif #endif
#ifdef AUDIO_ANC_FB_MC_HW #ifdef AUDIO_ANC_FB_MC_HW
anc_open(ANC_MUSICCANCLE); result = anc_open(ANC_MUSICCANCLE);
anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx, TRACE(2, "anc_open %s %d -> %d\n", __FUNCTION__, __LINE__, result);
ANC_MUSICCANCLE, ANC_GAIN_NO_DELAY); result = anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,
ANC_MUSICCANCLE, ANC_GAIN_NO_DELAY);
TRACE(2, "anc_select_coef %s %d -> %d\n", __FUNCTION__, __LINE__, result);
#endif #endif
#if defined(AUDIO_ANC_TT_HW) #if defined(AUDIO_ANC_TT_HW)
anc_open(ANC_TALKTHRU); anc_open(ANC_TALKTHRU);
anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx, TRACE(2, "anc_open %s %d -> %d\n", __FUNCTION__, __LINE__, result);
ANC_TALKTHRU, ANC_GAIN_NO_DELAY); result = anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,
ANC_TALKTHRU, ANC_GAIN_NO_DELAY);
TRACE(2, "anc_select_coef %s %d -> %d\n", __FUNCTION__, __LINE__, result);
#endif #endif
#ifdef AUDIO_ANC_FB_MC_HW #ifdef AUDIO_ANC_FB_MC_HW

20
config/open_source/target.mk
View File

@ -7,8 +7,8 @@ MBED ?= 0
RTOS ?= 1 RTOS ?= 1
#KERNEL ?= FREERTOS #KERNEL ?= FREERTOS
# We have powerkey input
NO_PWRKEY = 0 # We have powerkey input NO_PWRKEY = 0
LIBC_ROM ?= 1 LIBC_ROM ?= 1
export USER_SECURE_BOOT ?= 0 export USER_SECURE_BOOT ?= 0
@ -61,18 +61,26 @@ AUDIO_OUTPUT_DIFF ?= 0
#### ANC DEFINE START ###### #### ANC DEFINE START ######
export ANC_APP ?= 1 export ANC_APP ?= 1
# Feed Forward ANC configuration (external mic)
export ANC_FF_ENABLED ?= 1 export ANC_FF_ENABLED ?= 1
# Feed Backward ANC configuration (internal mic)
export ANC_FB_ENABLED ?= 1 export ANC_FB_ENABLED ?= 1
export ANC_WNR_ENABLED ?= 0
export AUDIO_ANC_FB_MC ?= 0 export AUDIO_ANC_FB_MC ?= 0
export AUDIO_SECTION_SUPPT ?= 0 export AUDIO_SECTION_SUPPT ?= 0
export AUD_SECTION_STRUCT_VERSION ?= 2 export AUD_SECTION_STRUCT_VERSION ?= 2
export AUDIO_ANC_FB_MC_HW ?=0 # Music cancel hardware?
export AUDIO_ANC_FB_MC_HW ?=1
export APP_ANC_KEY ?= 1 export APP_ANC_KEY ?= 1
export ANC_FB_CHECK ?= 1 export ANC_FB_CHECK ?= 1
##### ANC DEFINE END ###### ##### ANC DEFINE END ######
# Build in ANC testing app (closed source)
APP_ANC_TEST ?= 0 APP_ANC_TEST ?= 0
# Allow test commands via bluetooth
TEST_OVER_THE_AIR ?= 0 TEST_OVER_THE_AIR ?= 0
HW_FIR_EQ_PROCESS ?= 0 HW_FIR_EQ_PROCESS ?= 0
@ -93,7 +101,7 @@ PC_CMD_UART ?= 0
AUDIO_SECTION_ENABLE ?= 0 AUDIO_SECTION_ENABLE ?= 0
AUDIO_RESAMPLE ?= 1 AUDIO_RESAMPLE ?= 0
RESAMPLE_ANY_SAMPLE_RATE ?= 1 RESAMPLE_ANY_SAMPLE_RATE ?= 1
@ -206,8 +214,8 @@ TILE_DATAPATH_ENABLED ?= 0
CUSTOM_INFORMATION_TILE_ENABLE ?= 0 CUSTOM_INFORMATION_TILE_ENABLE ?= 0
INTERCONNECTION ?= 0 INTERCONNECTION ?= 0
# Looks like Find-My-Device support?
INTERACTION ?= 0 # Looks like Find-My-Device support? INTERACTION ?= 0
INTERACTION_FASTPAIR ?= 0 INTERACTION_FASTPAIR ?= 0

645
config/open_source/tgt_hardware.c
View File

@ -104,7 +104,7 @@ const struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM] = {
// bt config // bt config
// const char *BT_LOCAL_NAME = TO_STRING(BT_DEV_NAME) "\0"; // const char *BT_LOCAL_NAME = TO_STRING(BT_DEV_NAME) "\0";
const char *BT_LOCAL_NAME = "PineBuds Pro"; const char *BT_LOCAL_NAME = "PineBuds Pro";
const char *BLE_DEFAULT_NAME = "BES_BLE"; const char *BLE_DEFAULT_NAME = "PineBuds Pro BLE";
uint8_t ble_addr[6] = { uint8_t ble_addr[6] = {
#ifdef BLE_DEV_ADDR #ifdef BLE_DEV_ADDR
BLE_DEV_ADDR BLE_DEV_ADDR
@ -122,6 +122,7 @@ uint8_t bt_addr[6] = {
#endif #endif
}; };
/// True Wireless side configuration using resistor fitment
const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_tws_channel_cfg = { const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_tws_channel_cfg = {
HAL_IOMUX_PIN_P1_4, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_P1_4, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
HAL_IOMUX_PIN_PULLUP_ENABLE}; HAL_IOMUX_PIN_PULLUP_ENABLE};
@ -159,21 +160,22 @@ const struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY] = {
{TX_PA_GAIN, 0x03, -3}, {TX_PA_GAIN, 0x03, 0}, // 0dBm {TX_PA_GAIN, 0x03, -3}, {TX_PA_GAIN, 0x03, 0}, // 0dBm
}; };
#if SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 2 // MIC and channel configurations
#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \ // Pinebuds pro have the following mic's and biases
(AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC2 | \ /*
AUD_VMIC_MAP_VMIC3)
#elif SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 3 * User Voice (Talking) = MIC5 input and VMIC3 Bias
#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \ * ANC Feed Forward = MIC1 input and VMIC2 Bias
(AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1 | AUD_CHANNEL_MAP_CH4 | \ * ANC Feed Backward = MIC3 input and VMIC2 Bias
AUD_VMIC_MAP_VMIC1) *
#else * Note that AUD_CHANNEL_MAP is offset by 1 (0 start)
#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \ */
(AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC3)
#endif #define USER_TALK_MIC AUD_CHANNEL_MAP_CH4
#define USER_TALK_VMIC_CFG AUD_VMIC_MAP_VMIC3
#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV (USER_TALK_MIC | USER_TALK_VMIC_CFG)
#define CFG_HW_AUD_INPUT_PATH_LINEIN_DEV \
(AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)
#ifdef VOICE_DETECTOR_EN #ifdef VOICE_DETECTOR_EN
#define CFG_HW_AUD_INPUT_PATH_VADMIC_DEV \ #define CFG_HW_AUD_INPUT_PATH_VADMIC_DEV \
(AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC1) (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC1)
@ -184,32 +186,23 @@ const struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY] = {
const struct AUD_IO_PATH_CFG_T const struct AUD_IO_PATH_CFG_T
cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM] = { cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM] = {
#if defined(SPEECH_TX_AEC_CODEC_REF)
// NOTE: If enable Ch5 and CH6, need to add channel_num when setup
// audioflinger stream
{
AUD_INPUT_PATH_MAINMIC,
CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV | AUD_CHANNEL_MAP_CH4,
},
#else
{ {
AUD_INPUT_PATH_MAINMIC, AUD_INPUT_PATH_MAINMIC,
CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV, CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV,
}, },
#endif
{ {
AUD_INPUT_PATH_LINEIN, AUD_INPUT_PATH_LINEIN,
CFG_HW_AUD_INPUT_PATH_LINEIN_DEV, CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV,
}, },
#ifdef VOICE_DETECTOR_EN #ifdef VOICE_DETECTOR_EN
{ {
AUD_INPUT_PATH_VADMIC, AUD_INPUT_PATH_VADMIC,
CFG_HW_AUD_INPUT_PATH_VADMIC_DEV, CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV,
}, },
#else #else
{ {
AUD_INPUT_PATH_ASRMIC, AUD_INPUT_PATH_ASRMIC,
CFG_HW_AUD_INPUT_PATH_ASRMIC_DEV, CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV,
}, },
#endif #endif
}; };
@ -233,28 +226,18 @@ HAL_IOMUX_PIN_PULLUP_ENABLE
}; };
*/ */
// const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SDA ={ #define IIR_COUNTER_FF_L (8)
// HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, #define IIR_COUNTER_FF_R (8)
// HAL_IOMUX_PIN_PULLUP_ENABLE #define IIR_COUNTER_FB_L (6)
// }; #define IIR_COUNTER_FB_R (6)
// const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SCL ={
// HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,
// HAL_IOMUX_PIN_PULLUP_ENABLE
// };
#define IIR_COUNTER_FF_L (6)
#define IIR_COUNTER_FF_R (6)
#define IIR_COUNTER_FB_L (5)
#define IIR_COUNTER_FB_R (5)
static const struct_anc_cfg POSSIBLY_UNUSED static const struct_anc_cfg POSSIBLY_UNUSED
AncFirCoef_50p7k_mode0 = AncFirCoef_50p7k_mode0 =
{ {
.anc_cfg_ff_l = .anc_cfg_ff_l =
{ {
// .total_gain = 440, .total_gain = 440,
.total_gain = 350, // .total_gain = 350,
.iir_bypass_flag = 0, .iir_bypass_flag = 0,
.iir_counter = IIR_COUNTER_FF_L, .iir_counter = IIR_COUNTER_FF_L,
@ -285,12 +268,12 @@ static const struct_anc_cfg POSSIBLY_UNUSED
}, },
*/ */
.dac_gain_offset = 0, .dac_gain_offset = 0,
.adc_gain_offset = (0) * 4, .adc_gain_offset = (2) * 4,
}, },
.anc_cfg_ff_r = .anc_cfg_ff_r =
{ {
// .total_gain = 382, .total_gain = 382,
.total_gain = 350, // .total_gain = 350,
.iir_bypass_flag = 0, .iir_bypass_flag = 0,
.iir_counter = IIR_COUNTER_FF_R, .iir_counter = IIR_COUNTER_FF_R,
@ -321,7 +304,7 @@ static const struct_anc_cfg POSSIBLY_UNUSED
}, },
*/ */
.dac_gain_offset = 0, .dac_gain_offset = 0,
.adc_gain_offset = (0) * 4, .adc_gain_offset = (2) * 4,
}, },
/* /*
@ -375,7 +358,7 @@ static const struct_anc_cfg POSSIBLY_UNUSED
*/ */
.dac_gain_offset = 0, .dac_gain_offset = 0,
.adc_gain_offset = (0) * 4, .adc_gain_offset = (2) * 4,
}, },
.anc_cfg_fb_r = .anc_cfg_fb_r =
{ {
@ -410,75 +393,51 @@ static const struct_anc_cfg POSSIBLY_UNUSED
}, },
*/ */
.dac_gain_offset = 0, .dac_gain_offset = 0,
.adc_gain_offset = (0) * 4, .adc_gain_offset = (2) * 4,
}, },
}; };
/*
//ff
Filter1_B=[ 42463913, -84860822, 42396935];
Filter1_A=[ 134217728, -268353516, 134135801];
Filter2_B=[ 136002894, -267154076, 131168209];
Filter2_A=[ 134217728, -267154076, 132953376];
Filter3_B=[ 132863566, -263674901, 130888668];
Filter3_A=[ 134217728, -263674901, 129534506];
Filter4_B=[ 131621817, -256639526, 125746382];
Filter4_A=[ 134217728, -256639526, 123150471];
*/
static const struct_anc_cfg POSSIBLY_UNUSED static const struct_anc_cfg POSSIBLY_UNUSED
AncFirCoef_48k_mode0 = AncFirCoef_48k_mode0 =
{ {
.anc_cfg_ff_l = .anc_cfg_ff_l =
{ {
// .total_gain = 440, .total_gain = 302,
.total_gain = 312, // .total_gain = 312,
.iir_bypass_flag = 0, .iir_bypass_flag = 0,
.iir_counter = IIR_COUNTER_FF_L, .iir_counter = IIR_COUNTER_FF_L,
.iir_coef[0].coef_b = {42463913, -84860822, 42396935}, .iir_coef[0].coef_b = {47756600, -94784525, 47030952},
.iir_coef[0].coef_a = {134217728, -268353516, 134135801}, .iir_coef[0].coef_a = {134217728, -267141655, 132927324},
.iir_coef[1].coef_b = {136002894, -267154076, 131168209}, .iir_coef[1].coef_b = {95026235, -189959646, 94933615},
.iir_coef[1].coef_a = {134217728, -267154076, 132953376}, .iir_coef[1].coef_a = {134217728, -268325174, 134107649},
.iir_coef[2].coef_b = {132863566, -263674901, 130888668}, .iir_coef[2].coef_b = {137182418, -258280236, 121193611},
.iir_coef[2].coef_a = {134217728, -263674901, 129534506}, .iir_coef[2].coef_a = {134217728, -258309065, 124129473},
.iir_coef[3].coef_b = {131621817, -256639526, 125746382}, .iir_coef[3].coef_b = {119863779, -218243094, 100875648},
.iir_coef[3].coef_a = {134217728, -256639526, 123150471}, .iir_coef[3].coef_a = {134217728, -218243094, 86521699},
.iir_coef[4].coef_b = {0x8000000, 0, 0}, .iir_coef[4].coef_b = {118677290, -210108781, 98119610},
.iir_coef[4].coef_a = {0x8000000, 0, 0}, .iir_coef[4].coef_a = {134217728, -210108781, 82579171},
.iir_coef[5].coef_b = {0x8000000, 0, 0}, .iir_coef[5].coef_b = {133493787, -264941439, 131633425},
.iir_coef[5].coef_a = {0x8000000, 0, 0}, .iir_coef[5].coef_a = {134217728, -264941439, 130909484},
.iir_coef[6].coef_b = {134779906, -266962984, 132210881},
.iir_coef[6].coef_a = {134217728, -266962984, 132773059},
.iir_coef[7].coef_b = {134235269, -268350403, 134115242},
.iir_coef[7].coef_a = {134217728, -268350430, 134132755},
/* .fir_bypass_flag=1,
.fir_len = AUD_COEF_LEN,
.fir_coef =
{
32767,
},
*/
.dac_gain_offset = 0, .dac_gain_offset = 0,
.adc_gain_offset = (0) * 4, .adc_gain_offset = -24,
}, },
.anc_cfg_ff_r = .anc_cfg_ff_r =
{ {
// .total_gain = 382, .total_gain = 382,
.total_gain = 288, // .total_gain = 288,
.iir_bypass_flag = 0, .iir_bypass_flag = 0,
.iir_counter = IIR_COUNTER_FF_R, .iir_counter = IIR_COUNTER_FF_R,
@ -508,60 +467,36 @@ static const struct_anc_cfg POSSIBLY_UNUSED
}, },
*/ */
.dac_gain_offset = 0, .dac_gain_offset = 0,
.adc_gain_offset = (0) * 4, .adc_gain_offset = (2) * 4,
}, },
/*
Filter1_B=[ 27172676, -53803459, 26691412];
Filter1_A=[ 134217728, -214195429, 80219070];
Filter2_B=[ 138529480, -267551490, 129040578];
Filter2_A=[ 134217728, -267551490, 133352330];
Filter3_B=[ 134516353, -268162980, 133647489];
Filter3_A=[ 134217728, -268162980, 133946114];
Filter4_B=[ 133595549, -264581113, 131087955];
Filter4_A=[ 134217728, -264581113, 130465777];
*/
.anc_cfg_fb_l = .anc_cfg_fb_l =
{ {
.total_gain = 511, .total_gain = 512,
.iir_bypass_flag = 0, .iir_bypass_flag = 0,
.iir_counter = IIR_COUNTER_FB_L, .iir_counter = IIR_COUNTER_FB_L,
.iir_coef[0].coef_b = {27172676, -53803459, 26691412}, .iir_coef[0].coef_b = {75662976, -150466868, 74809339},
.iir_coef[0].coef_a = {134217728, -214195429, 80219070}, .iir_coef[0].coef_a = {134217728, -267572133, 133364091},
.iir_coef[1].coef_b = {138529480, -267551490, 129040578}, .iir_coef[1].coef_b = {136259446, -267048746, 130806222},
.iir_coef[1].coef_a = {134217728, -267551490, 133352330}, .iir_coef[1].coef_a = {134217728, -267048746, 132847940},
.iir_coef[2].coef_b = {134516353, -268162980, 133647489}, .iir_coef[2].coef_b = {134365088, -267930698, 133570324},
.iir_coef[2].coef_a = {134217728, -268162980, 133946114}, .iir_coef[2].coef_a = {134217728, -267932117, 133716266},
.iir_coef[3].coef_b = {133595549, -264581113, 131087955}, .iir_coef[3].coef_b = {124587325, -241835594, 118126292},
.iir_coef[3].coef_a = {134217728, -264581113, 130465777}, .iir_coef[3].coef_a = {134217728, -241835594, 108495889},
.iir_coef[4].coef_b = {0x8000000, 0, 0}, .iir_coef[4].coef_b = {130235205, -255036797, 124966921},
.iir_coef[4].coef_a = {0x8000000, 0, 0}, .iir_coef[4].coef_a = {134217728, -255036797, 120984398},
.iir_coef[5].coef_b = {0x8000000, 0, 0}, .iir_coef[5].coef_b = {134327171, -268333985, 134007055},
.iir_coef[5].coef_a = {0x8000000, 0, 0}, .iir_coef[5].coef_a = {134217728, -268333985, 134116498},
/* .fir_bypass_flag=1,
.fir_len = AUD_COEF_LEN,
.fir_coef =
{
32767,
},
*/
.dac_gain_offset = 0, .dac_gain_offset = 0,
.adc_gain_offset = (0) * 4, .adc_gain_offset = -24,
}, },
.anc_cfg_fb_r = .anc_cfg_fb_r =
{ {
@ -596,7 +531,7 @@ static const struct_anc_cfg POSSIBLY_UNUSED
}, },
*/ */
.dac_gain_offset = 0, .dac_gain_offset = 0,
.adc_gain_offset = (0) * 4, .adc_gain_offset = (2) * 4,
}, },
#if (AUD_SECTION_STRUCT_VERSION == 2) #if (AUD_SECTION_STRUCT_VERSION == 2)
@ -675,7 +610,7 @@ static const struct_anc_cfg POSSIBLY_UNUSED
.iir_coef[5].coef_a = {0x8000000, 0, 0}, .iir_coef[5].coef_a = {0x8000000, 0, 0},
.dac_gain_offset = 0, .dac_gain_offset = 0,
.adc_gain_offset = (0) * 4, .adc_gain_offset = (2) * 4,
}, },
.anc_cfg_mc_r = .anc_cfg_mc_r =
{ {
@ -703,269 +638,321 @@ static const struct_anc_cfg POSSIBLY_UNUSED
.iir_coef[5].coef_a = {0x8000000, 0, 0}, .iir_coef[5].coef_a = {0x8000000, 0, 0},
.dac_gain_offset = 0, .dac_gain_offset = 0,
.adc_gain_offset = (0) * 4, .adc_gain_offset = (2) * 4,
}, },
#endif #endif
}; };
/*
//ff
Filter1_B=[ 42465729, -84858529, 42392831];
Filter1_A=[ 134217728, -268346271, 134128558];
Filter2_B=[ 136159949, -267039705, 130899919];
Filter2_A=[ 134217728, -267039705, 132842140];
Filter3_B=[ 132746107, -263254540, 130599907];
Filter3_A=[ 134217728, -263254540, 129128286];
Filter4_B=[ 131402980, -255575175, 125032243];
Filter4_A=[ 134217728, -255575175, 122217496];
*/
static const struct_anc_cfg POSSIBLY_UNUSED static const struct_anc_cfg POSSIBLY_UNUSED
AncFirCoef_44p1k_mode0 = AncFirCoef_44p1k_mode0 = {
{ .anc_cfg_ff_l =
.anc_cfg_ff_l = {
{ .total_gain = 512,
// .total_gain = 440, // .total_gain = 312,
.total_gain = 312,
.iir_bypass_flag = 0, .iir_bypass_flag = 0,
.iir_counter = IIR_COUNTER_FF_L, .iir_counter = IIR_COUNTER_FF_L,
.iir_coef[0].coef_b = {42465729, -84858529, 42392831}, .iir_coef[0].coef_b = {47768463, -94743857, 46978979},
.iir_coef[0].coef_a = {134217728, -268346271, 134128558}, .iir_coef[0].coef_a = {134217728, -267027510, 132813804},
.iir_coef[1].coef_b = {136159949, -267039705, 130899919}, .iir_coef[1].coef_b = {95026887, -189952726, 94926080},
.iir_coef[1].coef_a = {134217728, -267039705, 132842140}, .iir_coef[1].coef_a = {134217728, -268315406, 134097919},
.iir_coef[2].coef_b = {132746107, -263254540, 130599907}, .iir_coef[2].coef_b = {137435276, -257412413, 120090247},
.iir_coef[2].coef_a = {134217728, -263254540, 129128286}, .iir_coef[2].coef_a = {134217728, -257446453, 123273755},
.iir_coef[3].coef_b = {131402980, -255575175, 125032243}, .iir_coef[3].coef_b = {118844778, -214442434, 98508661},
.iir_coef[3].coef_a = {134217728, -255575175, 122217496}, .iir_coef[3].coef_a = {134217728, -214442434, 83135711},
.iir_coef[4].coef_b = {0x8000000, 0, 0}, .iir_coef[4].coef_b = {117611223, -205468073, 95643298},
.iir_coef[4].coef_a = {0x8000000, 0, 0}, .iir_coef[4].coef_a = {134217728, -205468073, 79036793},
.iir_coef[5].coef_b = {0x8000000, 0, 0}, .iir_coef[5].coef_b = {133430657, -264618880, 131408063},
.iir_coef[5].coef_a = {0x8000000, 0, 0}, .iir_coef[5].coef_a = {134217728, -264618880, 130620992},
/* .fir_bypass_flag=1, .iir_coef[6].coef_b = {134829328, -266830863, 132034457},
.fir_len = AUD_COEF_LEN, .iir_coef[6].coef_a = {134217728, -266830863, 132646057},
.fir_coef =
{
32767,
},
*/
.dac_gain_offset = 0,
.adc_gain_offset = (0) * 4,
},
.anc_cfg_ff_r =
{
// .total_gain = 382,
.total_gain = 288,
.iir_bypass_flag = 0, .iir_coef[7].coef_b = {134236821, -268342876, 134106183},
.iir_counter = IIR_COUNTER_FF_R, .iir_coef[7].coef_a = {134217728, -268342908, 134125243},
.iir_coef[0].coef_b = {42465729, -84858529, 42392831}, // .fir_bypass_flag = 0,
.iir_coef[0].coef_a = {134217728, -268346271, 134128558}, // .fir_len = AUD_COEF_LEN,
// .fir_coef =
// {
// 0, 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, -6144, 0, 0, 0,
// 1, 0, 2048, -13511, -4060, -9831, 2011, 0,
// 2048, -13511, -4060, -9831, 2011, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, -6144, 512, 0, 0, 6, -14642,
// 1154, -18440, -2296, -26004, 1140, 0, 2048,
// 22833, -4082, -11362, 2033, -6957, 2081, 2958,
// -4073, 24038, 1991, 0, 2048, 2958, -4073,
// 17081, 2025, 29362, 2050, 25335, -4088, 16424,
// 2037, 0, 2048, 23654, -4088, -21431, 2039,
// 28309, 1889, 16812, -3657, 3193, 1783, 0, 2048,
// 16812, -3657, 31503, 1624, 9636, 1982, -13421,
// -3875, 2188, 1895, 0, 2048, -13421, -3875,
// 11824, 1829, -11954, 2049, -20607, -4095, -32689,
// 2044, 0, 2048, -20607, -4095, 20894, 2046, 0,
// 0, 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, -6144, 0,
// 0, 0, 1, 0, 2048, -13511, -4060,
// -9831, 2011, 0, 2048, -13511, -4060, -9831,
// 2011, 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 0,
// },
.reserved_for_drc =
{
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
},
.dac_gain_offset = 0,
.adc_gain_offset = -24,
},
.anc_cfg_ff_r =
{
.total_gain = 382,
// .total_gain = 288,
.iir_coef[1].coef_b = {136159949, -267039705, 130899919}, .iir_bypass_flag = 0,
.iir_coef[1].coef_a = {134217728, -267039705, 132842140}, .iir_counter = IIR_COUNTER_FF_R,
.iir_coef[2].coef_b = {132746107, -263254540, 130599907}, .iir_coef[0].coef_b = {42465729, -84858529, 42392831},
.iir_coef[2].coef_a = {134217728, -263254540, 129128286}, .iir_coef[0].coef_a = {134217728, -268346271, 134128558},
.iir_coef[3].coef_b = {131402980, -255575175, 125032243}, .iir_coef[1].coef_b = {136159949, -267039705, 130899919},
.iir_coef[3].coef_a = {134217728, -255575175, 122217496}, .iir_coef[1].coef_a = {134217728, -267039705, 132842140},
.iir_coef[4].coef_b = {0x8000000, 0, 0}, .iir_coef[2].coef_b = {132746107, -263254540, 130599907},
.iir_coef[4].coef_a = {0x8000000, 0, 0}, .iir_coef[2].coef_a = {134217728, -263254540, 129128286},
.iir_coef[5].coef_b = {0x8000000, 0, 0}, .iir_coef[3].coef_b = {131402980, -255575175, 125032243},
.iir_coef[5].coef_a = {0x8000000, 0, 0}, .iir_coef[3].coef_a = {134217728, -255575175, 122217496},
/* .fir_bypass_flag=1, .iir_coef[4].coef_b = {0x8000000, 0, 0},
.fir_len = AUD_COEF_LEN, .iir_coef[4].coef_a = {0x8000000, 0, 0},
.fir_coef =
{
32767,
},
*/
.dac_gain_offset = 0,
.adc_gain_offset = (0) * 4,
},
/* .iir_coef[5].coef_b = {0x8000000, 0, 0},
.iir_coef[5].coef_a = {0x8000000, 0, 0},
Filter1_B=[ 26719020, -52852829, 26204379]; /* .fir_bypass_flag=1,
Filter1_A=[ 134217728, -210410903, 76474119]; .fir_len = AUD_COEF_LEN,
.fir_coef =
{
32767,
},
*/
.dac_gain_offset = 0,
.adc_gain_offset = (2) * 4,
},
Filter2_B=[ 138909433, -267471808, 128584365]; /*
Filter2_A=[ 134217728, -267471808, 133276071];
Filter3_B=[ 134542733, -268138827, 133597115]; Filter1_B=[ 26719020, -52852829, 26204379];
Filter3_A=[ 134217728, -268138827, 133922120]; Filter1_A=[ 134217728, -210410903, 76474119];
Filter4_B=[ 133541379, -264235686, 130815458]; Filter2_B=[ 138909433, -267471808, 128584365];
Filter4_A=[ 134217728, -264235686, 130139109]; Filter2_A=[ 134217728, -267471808, 133276071];
*/ Filter3_B=[ 134542733, -268138827, 133597115];
Filter3_A=[ 134217728, -268138827, 133922120];
.anc_cfg_fb_l = Filter4_B=[ 133541379, -264235686, 130815458];
{ Filter4_A=[ 134217728, -264235686, 130139109];
.total_gain = 511,
.iir_bypass_flag = 0, */
.iir_counter = IIR_COUNTER_FB_L,
.iir_coef[0].coef_b = {26719020, -52852829, 26204379}, .anc_cfg_fb_l =
.iir_coef[0].coef_a = {134217728, -210410903, 76474119}, {
.total_gain = 512,
.iir_coef[1].coef_b = {138909433, -267471808, 128584365}, .iir_bypass_flag = 0,
.iir_coef[1].coef_a = {134217728, -267471808, 133276071}, .iir_counter = IIR_COUNTER_FB_L,
.iir_coef[2].coef_b = {134542733, -268138827, 133597115}, .iir_coef[0].coef_b = {75679438, -150423560, 74750572},
.iir_coef[2].coef_a = {134217728, -268138827, 133922120}, .iir_coef[0].coef_a = {134217728, -267495119, 133288862},
.iir_coef[3].coef_b = {133541379, -264235686, 130815458}, .iir_coef[1].coef_b = {136438995, -266925170, 130506214},
.iir_coef[3].coef_a = {134217728, -264235686, 130139109}, .iir_coef[1].coef_a = {134217728, -266925170, 132727481},
.iir_coef[4].coef_b = {0x8000000, 0, 0}, .iir_coef[2].coef_b = {134378162, -267885833, 133513256},
.iir_coef[4].coef_a = {0x8000000, 0, 0}, .iir_coef[2].coef_a = {134217728, -267887514, 133672009},
.iir_coef[5].coef_b = {0x8000000, 0, 0}, .iir_coef[3].coef_b = {123825813, -239648340, 116853881},
.iir_coef[5].coef_a = {0x8000000, 0, 0}, .iir_coef[3].coef_a = {134217728, -239648340, 106461967},
/* .fir_bypass_flag=1, .iir_coef[4].coef_b = {129901988, -253899885, 124192908},
.fir_len = AUD_COEF_LEN, .iir_coef[4].coef_a = {134217728, -253899885, 119877168},
.fir_coef =
{
32767,
},
*/
.dac_gain_offset = 0,
.adc_gain_offset = (0) * 4,
},
.anc_cfg_fb_r =
{
.total_gain = 511,
.iir_bypass_flag = 0, .iir_coef[5].coef_b = {134336846, -268324991, 133988431},
.iir_counter = IIR_COUNTER_FB_R, .iir_coef[5].coef_a = {134217728, -268324991, 134107550},
.iir_coef[0].coef_b = {26719020, -52852829, 26204379}, /* .fir_bypass_flag=1,
.iir_coef[0].coef_a = {134217728, -210410903, 76474119}, .fir_len = AUD_COEF_LEN,
.fir_coef =
{
32767,
},
*/
.dac_gain_offset = 0,
.adc_gain_offset = -24,
},
.anc_cfg_fb_r =
{
.total_gain = 511,
.iir_coef[1].coef_b = {138909433, -267471808, 128584365}, .iir_bypass_flag = 0,
.iir_coef[1].coef_a = {134217728, -267471808, 133276071}, .iir_counter = IIR_COUNTER_FB_R,
.iir_coef[2].coef_b = {134542733, -268138827, 133597115}, .iir_coef[0].coef_b = {26719020, -52852829, 26204379},
.iir_coef[2].coef_a = {134217728, -268138827, 133922120}, .iir_coef[0].coef_a = {134217728, -210410903, 76474119},
.iir_coef[3].coef_b = {133541379, -264235686, 130815458}, .iir_coef[1].coef_b = {138909433, -267471808, 128584365},
.iir_coef[3].coef_a = {134217728, -264235686, 130139109}, .iir_coef[1].coef_a = {134217728, -267471808, 133276071},
.iir_coef[4].coef_b = {0x8000000, 0, 0}, .iir_coef[2].coef_b = {134542733, -268138827, 133597115},
.iir_coef[4].coef_a = {0x8000000, 0, 0}, .iir_coef[2].coef_a = {134217728, -268138827, 133922120},
.iir_coef[5].coef_b = {0x8000000, 0, 0}, .iir_coef[3].coef_b = {133541379, -264235686, 130815458},
.iir_coef[5].coef_a = {0x8000000, 0, 0}, .iir_coef[3].coef_a = {134217728, -264235686, 130139109},
/* .fir_bypass_flag=1, .iir_coef[4].coef_b = {0x8000000, 0, 0},
.fir_len = AUD_COEF_LEN, .iir_coef[4].coef_a = {0x8000000, 0, 0},
.fir_coef =
{ .iir_coef[5].coef_b = {0x8000000, 0, 0},
32767, .iir_coef[5].coef_a = {0x8000000, 0, 0},
},
*/ /* .fir_bypass_flag=1,
.dac_gain_offset = 0, .fir_len = AUD_COEF_LEN,
.adc_gain_offset = (0) * 4, .fir_coef =
}, {
32767,
},
*/
.dac_gain_offset = 0,
.adc_gain_offset = (2) * 4,
},
#if (AUD_SECTION_STRUCT_VERSION == 2) #if (AUD_SECTION_STRUCT_VERSION == 2)
/* /*
Filter1_B=[ 19847881, -39594823, 19747071]; Filter1_B=[ 19847881, -39594823, 19747071];
Filter1_A=[ 16777216, -33314517, 16538159]; Filter1_A=[ 16777216, -33314517, 16538159];
Filter2_B=[ 9442890, -16603187, 7330251]; Filter2_B=[ 9442890, -16603187, 7330251];
Filter2_A=[ 16777216, -16603187, -4075]; Filter2_A=[ 16777216, -16603187, -4075];
Filter3_B=[ 18107639, -32779315, 14701642]; Filter3_B=[ 18107639, -32779315, 14701642];
Filter3_A=[ 16777216, -32779315, 16032065]; Filter3_A=[ 16777216, -32779315, 16032065];
Filter4_B=[ 12666347, -24058210, 11437046]; Filter4_B=[ 12666347, -24058210, 11437046];
Filter4_A=[ 16777216, -32089673, 15357640]; Filter4_A=[ 16777216, -32089673, 15357640];
Filter5_B=[ 16466312, -31915122, 15523589]; Filter5_B=[ 16466312, -31915122, 15523589];
Filter5_A=[ 16777216, -31915122, 15212684]; Filter5_A=[ 16777216, -31915122, 15212684];
*/ */
.anc_cfg_mc_l = .anc_cfg_mc_l =
{ {
.total_gain = 1228, .total_gain = 1228,
.iir_bypass_flag = 0, .iir_bypass_flag = 0,
.iir_counter = 5, .iir_counter = 5,
.iir_coef[0].coef_b = {19847881, -39594823, 19747071}, .iir_coef[0].coef_b = {19847881, -39594823, 19747071},
.iir_coef[0].coef_a = {16777216, -33314517, 16538159}, .iir_coef[0].coef_a = {16777216, -33314517, 16538159},
.iir_coef[1].coef_b = {9442890, -16603187, 7330251}, .iir_coef[1].coef_b = {9442890, -16603187, 7330251},
.iir_coef[1].coef_a = {16777216, -16603187, -4075}, .iir_coef[1].coef_a = {16777216, -16603187, -4075},
.iir_coef[2].coef_b = {18107639, -32779315, 14701642}, .iir_coef[2].coef_b = {18107639, -32779315, 14701642},
.iir_coef[2].coef_a = {16777216, -32779315, 16032065}, .iir_coef[2].coef_a = {16777216, -32779315, 16032065},
.iir_coef[3].coef_b = {12666347, -24058210, 11437046}, .iir_coef[3].coef_b = {12666347, -24058210, 11437046},
.iir_coef[3].coef_a = {16777216, -32089673, 15357640}, .iir_coef[3].coef_a = {16777216, -32089673, 15357640},
.iir_coef[4].coef_b = {16466312, -31915122, 15523589}, .iir_coef[4].coef_b = {16466312, -31915122, 15523589},
.iir_coef[4].coef_a = {16777216, -31915122, 15212684}, .iir_coef[4].coef_a = {16777216, -31915122, 15212684},
.iir_coef[5].coef_b = {0x8000000, 0, 0}, .iir_coef[5].coef_b = {0x8000000, 0, 0},
.iir_coef[5].coef_a = {0x8000000, 0, 0}, .iir_coef[5].coef_a = {0x8000000, 0, 0},
.dac_gain_offset = 0, .dac_gain_offset = 0,
.adc_gain_offset = (0) * 4, .adc_gain_offset = (2) * 4,
}, },
.anc_cfg_mc_r = .anc_cfg_mc_r =
{ {
.total_gain = 1331, .total_gain = 1331,
.iir_bypass_flag = 0, .iir_bypass_flag = 0,
.iir_counter = 5, .iir_counter = 5,
.iir_coef[0].coef_b = {19847881, -39594823, 19747071}, .iir_coef[0].coef_b = {19847881, -39594823, 19747071},
.iir_coef[0].coef_a = {16777216, -33314517, 16538159}, .iir_coef[0].coef_a = {16777216, -33314517, 16538159},
.iir_coef[1].coef_b = {9442890, -16603187, 7330251}, .iir_coef[1].coef_b = {9442890, -16603187, 7330251},
.iir_coef[1].coef_a = {16777216, -16603187, -4075}, .iir_coef[1].coef_a = {16777216, -16603187, -4075},
.iir_coef[2].coef_b = {18107639, -32779315, 14701642}, .iir_coef[2].coef_b = {18107639, -32779315, 14701642},
.iir_coef[2].coef_a = {16777216, -32779315, 16032065}, .iir_coef[2].coef_a = {16777216, -32779315, 16032065},
.iir_coef[3].coef_b = {12666347, -24058210, 11437046}, .iir_coef[3].coef_b = {12666347, -24058210, 11437046},
.iir_coef[3].coef_a = {16777216, -32089673, 15357640}, .iir_coef[3].coef_a = {16777216, -32089673, 15357640},
.iir_coef[4].coef_b = {16466312, -31915122, 15523589}, .iir_coef[4].coef_b = {16466312, -31915122, 15523589},
.iir_coef[4].coef_a = {16777216, -31915122, 15212684}, .iir_coef[4].coef_a = {16777216, -31915122, 15212684},
.iir_coef[5].coef_b = {0x8000000, 0, 0}, .iir_coef[5].coef_b = {0x8000000, 0, 0},
.iir_coef[5].coef_a = {0x8000000, 0, 0}, .iir_coef[5].coef_a = {0x8000000, 0, 0},
.dac_gain_offset = 0, .dac_gain_offset = 0,
.adc_gain_offset = (0) * 4, .adc_gain_offset = (2) * 4,
}, },
#endif #endif
}; };

27
config/open_source/tgt_hardware.h
View File

@ -96,10 +96,25 @@ extern const struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM
#define ANC_COEF_LIST_NUM (ANC_COEF_NUM) #define ANC_COEF_LIST_NUM (ANC_COEF_NUM)
#endif #endif
#define ANC_FF_MIC_CH_L AUD_CHANNEL_MAP_CH0 // MIC and channel configurations
#define ANC_FF_MIC_CH_R AUD_CHANNEL_MAP_CH1 // Pinebuds pro have the following mic's and biases
#define ANC_FB_MIC_CH_L AUD_CHANNEL_MAP_CH2 /*
#define ANC_FB_MIC_CH_R AUD_CHANNEL_MAP_CH3
* User Voice (Talking) = MIC5 input and VMIC3 Bias
* ANC Feed Forward = MIC1 input and VMIC2 Bias
* ANC Feed Backward = MIC3 input and VMIC2 Bias
*
* Note that AUD_CHANNEL_MAP is offset by 1 (0 start)
*/
#define ANC_FF_MIC AUD_CHANNEL_MAP_CH0
#define ANC_FB_MIC AUD_CHANNEL_MAP_CH2
#define ANC_FF_MIC_CH_L ANC_FF_MIC
#define ANC_FF_MIC_CH_R 0
#define ANC_FB_MIC_CH_L ANC_FB_MIC
#define ANC_FB_MIC_CH_R 0
#define ANC_VMIC_CFG AUD_VMIC_MAP_VMIC2
// audio codec // audio codec
#define CFG_HW_AUD_INPUT_PATH_NUM 3 #define CFG_HW_AUD_INPUT_PATH_NUM 3
@ -107,7 +122,7 @@ extern const struct AUD_IO_PATH_CFG_T cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_
#define CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV (AUD_CHANNEL_MAP_CH0) #define CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV (AUD_CHANNEL_MAP_CH0)
#define CFG_HW_AUD_SIDETONE_MIC_DEV (AUD_CHANNEL_MAP_CH0) #define CFG_HW_AUD_SIDETONE_MIC_DEV (AUD_CHANNEL_MAP_CH4)
#define CFG_HW_AUD_SIDETONE_GAIN_DBVAL (-20) #define CFG_HW_AUD_SIDETONE_GAIN_DBVAL (-20)
//bt config //bt config
@ -139,8 +154,6 @@ extern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator
extern bool tgt_tws_get_channel_is_right(void); extern bool tgt_tws_get_channel_is_right(void);
extern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SDA;
extern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SCL;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

1
dev_tools/anc_decoder/.gitignore vendored Normal file
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@ -0,0 +1 @@
target/

119
dev_tools/anc_decoder/Cargo.lock generated Normal file
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@ -0,0 +1,119 @@
# This file is automatically @generated by Cargo.
# It is not intended for manual editing.
version = 3
[[package]]
name = "anc_decoder"
version = "0.1.0"
dependencies = [
"declio",
]
[[package]]
name = "darling"
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9
dev_tools/anc_decoder/Cargo.toml Normal file
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@ -0,0 +1,9 @@
[package]
name = "anc_decoder"
version = "0.1.0"
edition = "2021"
# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
[dependencies]
declio = "0.2.0"

132
dev_tools/anc_decoder/src/main.rs Normal file
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@ -0,0 +1,132 @@
use declio::ctx::Endian;
use declio::{Decode, Encode};
use std::fs::File;
use std::io::Read;
//Super experimental dumb tooling for parsing out the ANC data
// This is not production code, expect panics
const AUDIO_START: usize = 0x003EE000;
const AUDIO_LEN: usize = 16;
const AUD_IIR_NUM: usize = 8;
const AUD_COEF_LEN: usize = 0;
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
struct AudSectionHead {
#[declio(ctx = "Endian::Little")]
magic: u16,
#[declio(ctx = "Endian::Little")]
vesrion: u16,
#[declio(ctx = "Endian::Little")]
crc: u32,
#[declio(ctx = "Endian::Little")]
reserved0: u32,
#[declio(ctx = "Endian::Little")]
reserved1: u32,
}
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
struct AudSectionBodyIdent {
anc_ver: [u8; 16], // These are actually char* but honestly doesnt matter as seem to always be 0x00
batch_info: [u8; 16], // These are actually char* but honestly doesnt matter as seem to always be 0x00
serial: [u8; 16], // These are actually char* but honestly doesnt matter as seem to always be 0x00
}
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
struct anc_iir_coefs {
#[declio(ctx = "Endian::Little")]
coef_b: [i32; 3],
#[declio(ctx = "Endian::Little")]
coef_a: [i32; 3],
}
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
struct aud_item {
#[declio(ctx = "Endian::Little")]
total_gain: u32,
#[declio(ctx = "Endian::Little")]
iir_bypass_flag: u16,
#[declio(ctx = "Endian::Little")]
iir_counter: u16,
iir_coef: [anc_iir_coefs; AUD_IIR_NUM],
// #if (AUD_SECTION_STRUCT_VERSION == 1)
// #[declio(ctx = "Endian::Little")]
// fir_bypass_flag: u16,
// #[declio(ctx = "Endian::Little")]
// fir_len: u16,
// #[declio(ctx = "Endian::Little")]
// fir_coef: [i16; AUD_COEF_LEN],
// pos_tab: [i8; 16],
// #elif (AUD_SECTION_STRUCT_VERSION == 2)
#[declio(ctx = "Endian::Little")]
reserved_for_drc: [u32; 32],
// #elif (AUD_SECTION_STRUCT_VERSION == 3)
// #endif
#[declio(ctx = "Endian::Little")]
reserved1: i16,
dac_gain_offset: i8, // in qdb (quater of dB)
adc_gain_offset: i8, // in qdb (quater of dB)
}
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
struct struct_anc_cfg {
//V1+
anc_cfg_ff_l: aud_item,
anc_cfg_ff_r: aud_item,
anc_cfg_fb_l: aud_item,
anc_cfg_fb_r: aud_item,
//V2
anc_cfg_tt_l: aud_item,
anc_cfg_tt_r: aud_item,
anc_cfg_mc_l: aud_item,
anc_cfg_mc_r: aud_item,
}
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
struct pctool_struct_anc_cfg {
//
anc_cfg: [struct_anc_cfg; 2], //0 == 41k, 2==44k
}
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
struct AudSectionBodyConfig {
anc_config_arr: [pctool_struct_anc_cfg; 1], // we may only use first of 4 entries
}
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
struct AudSectionBody {
anc_ident: AudSectionBodyIdent,
anc_config: AudSectionBodyConfig,
}
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
struct PctoolAudSection {
header: AudSectionHead,
body: AudSectionBody,
}
fn main() {
println!("Super dumb anc firmware details dumper");
println!("By Ralim <ralim@ralimtek.com>");
println!("Reading firmware.bin");
let file_contents = get_firmware_file("firmware.bin");
println!("Running decoder");
let dummy_init: PctoolAudSection = PctoolAudSection::default();
let dummy_serialised = declio::to_bytes(dummy_init).unwrap();
let decoded: PctoolAudSection =
declio::from_bytes(&file_contents[AUDIO_START..AUDIO_START + dummy_serialised.len()])
.expect("decode failed");
println!("Decoded {:#?}", decoded)
}
fn get_firmware_file(filename: &str) -> Vec<u8> {
let mut f = File::open(&filename).expect("no file found");
let mut buffer = Vec::new();
// read the whole file
f.read_to_end(&mut buffer).expect("could not read file");
buffer
}

1
platform/drivers/ana/best2300p/analog_best2300p.c
View File

@ -123,6 +123,7 @@
#endif #endif
#ifndef ANC_VMIC_CFG #ifndef ANC_VMIC_CFG
#error "No ANC VMIC configured"
#define ANC_VMIC_CFG (AUD_VMIC_MAP_VMIC1) #define ANC_VMIC_CFG (AUD_VMIC_MAP_VMIC1)
#endif #endif