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10 Commits
0a82336258
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c7372d21d2
| Author | SHA1 | Date |
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Ben V. Brown
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c7372d21d2
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Ben V. Brown
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16cfcb1002
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Ben V. Brown
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8e91ed7282
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Ben V. Brown
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9a747bdaad
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Ben V. Brown
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94e2f92c29
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Ben V. Brown
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64e193ad66
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Ben V. Brown
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33fdf13003
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Ben V. Brown
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396ea8e2a7
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Ben V. Brown
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c5570b96ca
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Ben V. Brown
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037cee323a
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@ -61,15 +61,18 @@ AUDIO_OUTPUT_DIFF ?= 0
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#### ANC DEFINE START ######
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export ANC_APP ?= 1
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export ANC_FF_ENABLED ?= 1
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# Feed Forward ANC configuration (external mic)
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export ANC_FB_ENABLED ?= 1
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export ANC_FF_ENABLED ?= 1
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# Feed Backward ANC configuration (internal mic)
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export ANC_FB_ENABLED ?= 1
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export ANC_WNR_ENABLED ?= 0
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export AUDIO_ANC_FB_MC ?= 0
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export AUDIO_SECTION_SUPPT ?= 0
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export AUD_SECTION_STRUCT_VERSION ?= 2
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# Music cancel hardware?
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export AUDIO_ANC_FB_MC_HW ?=0
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export AUDIO_ANC_FB_MC_HW ?=1
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export APP_ANC_KEY ?= 1
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export ANC_FB_CHECK ?= 1
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##### ANC DEFINE END ######
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@ -98,7 +101,7 @@ PC_CMD_UART ?= 0
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AUDIO_SECTION_ENABLE ?= 0
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AUDIO_RESAMPLE ?= 1
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AUDIO_RESAMPLE ?= 0
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RESAMPLE_ANY_SAMPLE_RATE ?= 1
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@ -171,7 +171,6 @@ const struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY] = {
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* Note that AUD_CHANNEL_MAP is offset by 1 (0 start)
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*/
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#define USER_TALK_MIC AUD_CHANNEL_MAP_CH4
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#define USER_TALK_VMIC_CFG AUD_VMIC_MAP_VMIC3
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@ -227,18 +226,18 @@ HAL_IOMUX_PIN_PULLUP_ENABLE
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};
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*/
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#define IIR_COUNTER_FF_L (6)
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#define IIR_COUNTER_FF_R (6)
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#define IIR_COUNTER_FB_L (5)
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#define IIR_COUNTER_FB_R (5)
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#define IIR_COUNTER_FF_L (8)
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#define IIR_COUNTER_FF_R (8)
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#define IIR_COUNTER_FB_L (6)
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#define IIR_COUNTER_FB_R (6)
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static const struct_anc_cfg POSSIBLY_UNUSED
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AncFirCoef_50p7k_mode0 =
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{
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.anc_cfg_ff_l =
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{
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// .total_gain = 440,
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.total_gain = 350,
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.total_gain = 440,
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// .total_gain = 350,
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.iir_bypass_flag = 0,
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.iir_counter = IIR_COUNTER_FF_L,
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@ -269,12 +268,12 @@ static const struct_anc_cfg POSSIBLY_UNUSED
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},
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*/
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.dac_gain_offset = 0,
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.adc_gain_offset = (0) * 4,
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.adc_gain_offset = (2) * 4,
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},
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.anc_cfg_ff_r =
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{
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// .total_gain = 382,
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.total_gain = 350,
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.total_gain = 382,
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// .total_gain = 350,
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.iir_bypass_flag = 0,
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.iir_counter = IIR_COUNTER_FF_R,
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@ -305,7 +304,7 @@ static const struct_anc_cfg POSSIBLY_UNUSED
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},
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*/
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.dac_gain_offset = 0,
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.adc_gain_offset = (0) * 4,
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.adc_gain_offset = (2) * 4,
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},
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/*
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@ -359,7 +358,7 @@ static const struct_anc_cfg POSSIBLY_UNUSED
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*/
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.dac_gain_offset = 0,
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.adc_gain_offset = (0) * 4,
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.adc_gain_offset = (2) * 4,
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},
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.anc_cfg_fb_r =
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{
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@ -394,75 +393,51 @@ static const struct_anc_cfg POSSIBLY_UNUSED
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},
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*/
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.dac_gain_offset = 0,
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.adc_gain_offset = (0) * 4,
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.adc_gain_offset = (2) * 4,
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},
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};
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/*
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//ff
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Filter1_B=[ 42463913, -84860822, 42396935];
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Filter1_A=[ 134217728, -268353516, 134135801];
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Filter2_B=[ 136002894, -267154076, 131168209];
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Filter2_A=[ 134217728, -267154076, 132953376];
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Filter3_B=[ 132863566, -263674901, 130888668];
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Filter3_A=[ 134217728, -263674901, 129534506];
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Filter4_B=[ 131621817, -256639526, 125746382];
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Filter4_A=[ 134217728, -256639526, 123150471];
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*/
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static const struct_anc_cfg POSSIBLY_UNUSED
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AncFirCoef_48k_mode0 =
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{
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.anc_cfg_ff_l =
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{
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// .total_gain = 440,
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.total_gain = 312,
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.total_gain = 302,
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// .total_gain = 312,
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.iir_bypass_flag = 0,
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.iir_counter = IIR_COUNTER_FF_L,
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.iir_coef[0].coef_b = {42463913, -84860822, 42396935},
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.iir_coef[0].coef_a = {134217728, -268353516, 134135801},
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.iir_coef[0].coef_b = {47756600, -94784525, 47030952},
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.iir_coef[0].coef_a = {134217728, -267141655, 132927324},
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.iir_coef[1].coef_b = {136002894, -267154076, 131168209},
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.iir_coef[1].coef_a = {134217728, -267154076, 132953376},
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.iir_coef[1].coef_b = {95026235, -189959646, 94933615},
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.iir_coef[1].coef_a = {134217728, -268325174, 134107649},
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.iir_coef[2].coef_b = {132863566, -263674901, 130888668},
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.iir_coef[2].coef_a = {134217728, -263674901, 129534506},
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.iir_coef[2].coef_b = {137182418, -258280236, 121193611},
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.iir_coef[2].coef_a = {134217728, -258309065, 124129473},
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.iir_coef[3].coef_b = {131621817, -256639526, 125746382},
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.iir_coef[3].coef_a = {134217728, -256639526, 123150471},
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.iir_coef[3].coef_b = {119863779, -218243094, 100875648},
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.iir_coef[3].coef_a = {134217728, -218243094, 86521699},
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.iir_coef[4].coef_b = {0x8000000, 0, 0},
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.iir_coef[4].coef_a = {0x8000000, 0, 0},
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.iir_coef[4].coef_b = {118677290, -210108781, 98119610},
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.iir_coef[4].coef_a = {134217728, -210108781, 82579171},
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.iir_coef[5].coef_b = {0x8000000, 0, 0},
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.iir_coef[5].coef_a = {0x8000000, 0, 0},
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.iir_coef[5].coef_b = {133493787, -264941439, 131633425},
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.iir_coef[5].coef_a = {134217728, -264941439, 130909484},
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.iir_coef[6].coef_b = {134779906, -266962984, 132210881},
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.iir_coef[6].coef_a = {134217728, -266962984, 132773059},
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.iir_coef[7].coef_b = {134235269, -268350403, 134115242},
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.iir_coef[7].coef_a = {134217728, -268350430, 134132755},
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/* .fir_bypass_flag=1,
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.fir_len = AUD_COEF_LEN,
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.fir_coef =
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{
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32767,
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},
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*/
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.dac_gain_offset = 0,
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.adc_gain_offset = (0) * 4,
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.adc_gain_offset = -24,
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},
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.anc_cfg_ff_r =
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{
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// .total_gain = 382,
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.total_gain = 288,
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.total_gain = 382,
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// .total_gain = 288,
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.iir_bypass_flag = 0,
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.iir_counter = IIR_COUNTER_FF_R,
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@ -492,60 +467,36 @@ static const struct_anc_cfg POSSIBLY_UNUSED
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},
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*/
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.dac_gain_offset = 0,
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.adc_gain_offset = (0) * 4,
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.adc_gain_offset = (2) * 4,
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},
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/*
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Filter1_B=[ 27172676, -53803459, 26691412];
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Filter1_A=[ 134217728, -214195429, 80219070];
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Filter2_B=[ 138529480, -267551490, 129040578];
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Filter2_A=[ 134217728, -267551490, 133352330];
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Filter3_B=[ 134516353, -268162980, 133647489];
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Filter3_A=[ 134217728, -268162980, 133946114];
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Filter4_B=[ 133595549, -264581113, 131087955];
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Filter4_A=[ 134217728, -264581113, 130465777];
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*/
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.anc_cfg_fb_l =
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{
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.total_gain = 511,
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.total_gain = 512,
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.iir_bypass_flag = 0,
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.iir_counter = IIR_COUNTER_FB_L,
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.iir_coef[0].coef_b = {27172676, -53803459, 26691412},
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.iir_coef[0].coef_a = {134217728, -214195429, 80219070},
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.iir_coef[0].coef_b = {75662976, -150466868, 74809339},
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.iir_coef[0].coef_a = {134217728, -267572133, 133364091},
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.iir_coef[1].coef_b = {138529480, -267551490, 129040578},
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.iir_coef[1].coef_a = {134217728, -267551490, 133352330},
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.iir_coef[1].coef_b = {136259446, -267048746, 130806222},
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.iir_coef[1].coef_a = {134217728, -267048746, 132847940},
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.iir_coef[2].coef_b = {134516353, -268162980, 133647489},
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.iir_coef[2].coef_a = {134217728, -268162980, 133946114},
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.iir_coef[2].coef_b = {134365088, -267930698, 133570324},
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.iir_coef[2].coef_a = {134217728, -267932117, 133716266},
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.iir_coef[3].coef_b = {133595549, -264581113, 131087955},
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.iir_coef[3].coef_a = {134217728, -264581113, 130465777},
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.iir_coef[3].coef_b = {124587325, -241835594, 118126292},
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.iir_coef[3].coef_a = {134217728, -241835594, 108495889},
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.iir_coef[4].coef_b = {0x8000000, 0, 0},
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.iir_coef[4].coef_a = {0x8000000, 0, 0},
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.iir_coef[4].coef_b = {130235205, -255036797, 124966921},
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.iir_coef[4].coef_a = {134217728, -255036797, 120984398},
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.iir_coef[5].coef_b = {0x8000000, 0, 0},
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.iir_coef[5].coef_a = {0x8000000, 0, 0},
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.iir_coef[5].coef_b = {134327171, -268333985, 134007055},
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.iir_coef[5].coef_a = {134217728, -268333985, 134116498},
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/* .fir_bypass_flag=1,
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.fir_len = AUD_COEF_LEN,
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.fir_coef =
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{
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32767,
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},
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*/
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.dac_gain_offset = 0,
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.adc_gain_offset = (0) * 4,
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.adc_gain_offset = -24,
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},
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.anc_cfg_fb_r =
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{
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@ -580,7 +531,7 @@ static const struct_anc_cfg POSSIBLY_UNUSED
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},
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*/
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.dac_gain_offset = 0,
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.adc_gain_offset = (0) * 4,
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.adc_gain_offset = (2) * 4,
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},
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#if (AUD_SECTION_STRUCT_VERSION == 2)
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@ -659,7 +610,7 @@ static const struct_anc_cfg POSSIBLY_UNUSED
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.iir_coef[5].coef_a = {0x8000000, 0, 0},
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.dac_gain_offset = 0,
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.adc_gain_offset = (0) * 4,
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.adc_gain_offset = (2) * 4,
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},
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.anc_cfg_mc_r =
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{
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@ -687,269 +638,321 @@ static const struct_anc_cfg POSSIBLY_UNUSED
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.iir_coef[5].coef_a = {0x8000000, 0, 0},
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.dac_gain_offset = 0,
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.adc_gain_offset = (0) * 4,
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.adc_gain_offset = (2) * 4,
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},
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#endif
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};
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/*
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//ff
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Filter1_B=[ 42465729, -84858529, 42392831];
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Filter1_A=[ 134217728, -268346271, 134128558];
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Filter2_B=[ 136159949, -267039705, 130899919];
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Filter2_A=[ 134217728, -267039705, 132842140];
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Filter3_B=[ 132746107, -263254540, 130599907];
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Filter3_A=[ 134217728, -263254540, 129128286];
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Filter4_B=[ 131402980, -255575175, 125032243];
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Filter4_A=[ 134217728, -255575175, 122217496];
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*/
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static const struct_anc_cfg POSSIBLY_UNUSED
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AncFirCoef_44p1k_mode0 =
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{
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.anc_cfg_ff_l =
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{
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// .total_gain = 440,
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.total_gain = 312,
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AncFirCoef_44p1k_mode0 = {
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.anc_cfg_ff_l =
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{
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.total_gain = 512,
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// .total_gain = 312,
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.iir_bypass_flag = 0,
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.iir_counter = IIR_COUNTER_FF_L,
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.iir_bypass_flag = 0,
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.iir_counter = IIR_COUNTER_FF_L,
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.iir_coef[0].coef_b = {42465729, -84858529, 42392831},
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.iir_coef[0].coef_a = {134217728, -268346271, 134128558},
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.iir_coef[0].coef_b = {47768463, -94743857, 46978979},
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.iir_coef[0].coef_a = {134217728, -267027510, 132813804},
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.iir_coef[1].coef_b = {136159949, -267039705, 130899919},
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.iir_coef[1].coef_a = {134217728, -267039705, 132842140},
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.iir_coef[1].coef_b = {95026887, -189952726, 94926080},
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||||
.iir_coef[1].coef_a = {134217728, -268315406, 134097919},
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.iir_coef[2].coef_b = {132746107, -263254540, 130599907},
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||||
.iir_coef[2].coef_a = {134217728, -263254540, 129128286},
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||||
.iir_coef[2].coef_b = {137435276, -257412413, 120090247},
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||||
.iir_coef[2].coef_a = {134217728, -257446453, 123273755},
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||||
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.iir_coef[3].coef_b = {131402980, -255575175, 125032243},
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||||
.iir_coef[3].coef_a = {134217728, -255575175, 122217496},
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||||
.iir_coef[3].coef_b = {118844778, -214442434, 98508661},
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||||
.iir_coef[3].coef_a = {134217728, -214442434, 83135711},
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||||
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.iir_coef[4].coef_b = {0x8000000, 0, 0},
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.iir_coef[4].coef_a = {0x8000000, 0, 0},
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||||
.iir_coef[4].coef_b = {117611223, -205468073, 95643298},
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||||
.iir_coef[4].coef_a = {134217728, -205468073, 79036793},
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||||
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.iir_coef[5].coef_b = {0x8000000, 0, 0},
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||||
.iir_coef[5].coef_a = {0x8000000, 0, 0},
|
||||
.iir_coef[5].coef_b = {133430657, -264618880, 131408063},
|
||||
.iir_coef[5].coef_a = {134217728, -264618880, 130620992},
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||||
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/* .fir_bypass_flag=1,
|
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.fir_len = AUD_COEF_LEN,
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.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset = 0,
|
||||
.adc_gain_offset = (0) * 4,
|
||||
},
|
||||
.anc_cfg_ff_r =
|
||||
{
|
||||
// .total_gain = 382,
|
||||
.total_gain = 288,
|
||||
.iir_coef[6].coef_b = {134829328, -266830863, 132034457},
|
||||
.iir_coef[6].coef_a = {134217728, -266830863, 132646057},
|
||||
|
||||
.iir_bypass_flag = 0,
|
||||
.iir_counter = IIR_COUNTER_FF_R,
|
||||
.iir_coef[7].coef_b = {134236821, -268342876, 134106183},
|
||||
.iir_coef[7].coef_a = {134217728, -268342908, 134125243},
|
||||
|
||||
.iir_coef[0].coef_b = {42465729, -84858529, 42392831},
|
||||
.iir_coef[0].coef_a = {134217728, -268346271, 134128558},
|
||||
// .fir_bypass_flag = 0,
|
||||
// .fir_len = AUD_COEF_LEN,
|
||||
// .fir_coef =
|
||||
// {
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, -6144, 0, 0, 0,
|
||||
// 1, 0, 2048, -13511, -4060, -9831, 2011, 0,
|
||||
// 2048, -13511, -4060, -9831, 2011, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, -6144, 512, 0, 0, 6, -14642,
|
||||
// 1154, -18440, -2296, -26004, 1140, 0, 2048,
|
||||
// 22833, -4082, -11362, 2033, -6957, 2081, 2958,
|
||||
// -4073, 24038, 1991, 0, 2048, 2958, -4073,
|
||||
// 17081, 2025, 29362, 2050, 25335, -4088, 16424,
|
||||
// 2037, 0, 2048, 23654, -4088, -21431, 2039,
|
||||
// 28309, 1889, 16812, -3657, 3193, 1783, 0, 2048,
|
||||
// 16812, -3657, 31503, 1624, 9636, 1982, -13421,
|
||||
// -3875, 2188, 1895, 0, 2048, -13421, -3875,
|
||||
// 11824, 1829, -11954, 2049, -20607, -4095, -32689,
|
||||
// 2044, 0, 2048, -20607, -4095, 20894, 2046, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, -6144, 0,
|
||||
// 0, 0, 1, 0, 2048, -13511, -4060,
|
||||
// -9831, 2011, 0, 2048, -13511, -4060, -9831,
|
||||
// 2011, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
// },
|
||||
.reserved_for_drc =
|
||||
{
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
},
|
||||
.dac_gain_offset = 0,
|
||||
.adc_gain_offset = -24,
|
||||
},
|
||||
.anc_cfg_ff_r =
|
||||
{
|
||||
.total_gain = 382,
|
||||
// .total_gain = 288,
|
||||
|
||||
.iir_coef[1].coef_b = {136159949, -267039705, 130899919},
|
||||
.iir_coef[1].coef_a = {134217728, -267039705, 132842140},
|
||||
.iir_bypass_flag = 0,
|
||||
.iir_counter = IIR_COUNTER_FF_R,
|
||||
|
||||
.iir_coef[2].coef_b = {132746107, -263254540, 130599907},
|
||||
.iir_coef[2].coef_a = {134217728, -263254540, 129128286},
|
||||
.iir_coef[0].coef_b = {42465729, -84858529, 42392831},
|
||||
.iir_coef[0].coef_a = {134217728, -268346271, 134128558},
|
||||
|
||||
.iir_coef[3].coef_b = {131402980, -255575175, 125032243},
|
||||
.iir_coef[3].coef_a = {134217728, -255575175, 122217496},
|
||||
.iir_coef[1].coef_b = {136159949, -267039705, 130899919},
|
||||
.iir_coef[1].coef_a = {134217728, -267039705, 132842140},
|
||||
|
||||
.iir_coef[4].coef_b = {0x8000000, 0, 0},
|
||||
.iir_coef[4].coef_a = {0x8000000, 0, 0},
|
||||
.iir_coef[2].coef_b = {132746107, -263254540, 130599907},
|
||||
.iir_coef[2].coef_a = {134217728, -263254540, 129128286},
|
||||
|
||||
.iir_coef[5].coef_b = {0x8000000, 0, 0},
|
||||
.iir_coef[5].coef_a = {0x8000000, 0, 0},
|
||||
.iir_coef[3].coef_b = {131402980, -255575175, 125032243},
|
||||
.iir_coef[3].coef_a = {134217728, -255575175, 122217496},
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset = 0,
|
||||
.adc_gain_offset = (0) * 4,
|
||||
},
|
||||
.iir_coef[4].coef_b = {0x8000000, 0, 0},
|
||||
.iir_coef[4].coef_a = {0x8000000, 0, 0},
|
||||
|
||||
/*
|
||||
.iir_coef[5].coef_b = {0x8000000, 0, 0},
|
||||
.iir_coef[5].coef_a = {0x8000000, 0, 0},
|
||||
|
||||
Filter1_B=[ 26719020, -52852829, 26204379];
|
||||
Filter1_A=[ 134217728, -210410903, 76474119];
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset = 0,
|
||||
.adc_gain_offset = (2) * 4,
|
||||
},
|
||||
|
||||
Filter2_B=[ 138909433, -267471808, 128584365];
|
||||
Filter2_A=[ 134217728, -267471808, 133276071];
|
||||
/*
|
||||
|
||||
Filter3_B=[ 134542733, -268138827, 133597115];
|
||||
Filter3_A=[ 134217728, -268138827, 133922120];
|
||||
Filter1_B=[ 26719020, -52852829, 26204379];
|
||||
Filter1_A=[ 134217728, -210410903, 76474119];
|
||||
|
||||
Filter4_B=[ 133541379, -264235686, 130815458];
|
||||
Filter4_A=[ 134217728, -264235686, 130139109];
|
||||
Filter2_B=[ 138909433, -267471808, 128584365];
|
||||
Filter2_A=[ 134217728, -267471808, 133276071];
|
||||
|
||||
*/
|
||||
Filter3_B=[ 134542733, -268138827, 133597115];
|
||||
Filter3_A=[ 134217728, -268138827, 133922120];
|
||||
|
||||
.anc_cfg_fb_l =
|
||||
{
|
||||
.total_gain = 511,
|
||||
Filter4_B=[ 133541379, -264235686, 130815458];
|
||||
Filter4_A=[ 134217728, -264235686, 130139109];
|
||||
|
||||
.iir_bypass_flag = 0,
|
||||
.iir_counter = IIR_COUNTER_FB_L,
|
||||
*/
|
||||
|
||||
.iir_coef[0].coef_b = {26719020, -52852829, 26204379},
|
||||
.iir_coef[0].coef_a = {134217728, -210410903, 76474119},
|
||||
.anc_cfg_fb_l =
|
||||
{
|
||||
.total_gain = 512,
|
||||
|
||||
.iir_coef[1].coef_b = {138909433, -267471808, 128584365},
|
||||
.iir_coef[1].coef_a = {134217728, -267471808, 133276071},
|
||||
.iir_bypass_flag = 0,
|
||||
.iir_counter = IIR_COUNTER_FB_L,
|
||||
|
||||
.iir_coef[2].coef_b = {134542733, -268138827, 133597115},
|
||||
.iir_coef[2].coef_a = {134217728, -268138827, 133922120},
|
||||
.iir_coef[0].coef_b = {75679438, -150423560, 74750572},
|
||||
.iir_coef[0].coef_a = {134217728, -267495119, 133288862},
|
||||
|
||||
.iir_coef[3].coef_b = {133541379, -264235686, 130815458},
|
||||
.iir_coef[3].coef_a = {134217728, -264235686, 130139109},
|
||||
.iir_coef[1].coef_b = {136438995, -266925170, 130506214},
|
||||
.iir_coef[1].coef_a = {134217728, -266925170, 132727481},
|
||||
|
||||
.iir_coef[4].coef_b = {0x8000000, 0, 0},
|
||||
.iir_coef[4].coef_a = {0x8000000, 0, 0},
|
||||
.iir_coef[2].coef_b = {134378162, -267885833, 133513256},
|
||||
.iir_coef[2].coef_a = {134217728, -267887514, 133672009},
|
||||
|
||||
.iir_coef[5].coef_b = {0x8000000, 0, 0},
|
||||
.iir_coef[5].coef_a = {0x8000000, 0, 0},
|
||||
.iir_coef[3].coef_b = {123825813, -239648340, 116853881},
|
||||
.iir_coef[3].coef_a = {134217728, -239648340, 106461967},
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset = 0,
|
||||
.adc_gain_offset = (0) * 4,
|
||||
},
|
||||
.anc_cfg_fb_r =
|
||||
{
|
||||
.total_gain = 511,
|
||||
.iir_coef[4].coef_b = {129901988, -253899885, 124192908},
|
||||
.iir_coef[4].coef_a = {134217728, -253899885, 119877168},
|
||||
|
||||
.iir_bypass_flag = 0,
|
||||
.iir_counter = IIR_COUNTER_FB_R,
|
||||
.iir_coef[5].coef_b = {134336846, -268324991, 133988431},
|
||||
.iir_coef[5].coef_a = {134217728, -268324991, 134107550},
|
||||
|
||||
.iir_coef[0].coef_b = {26719020, -52852829, 26204379},
|
||||
.iir_coef[0].coef_a = {134217728, -210410903, 76474119},
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset = 0,
|
||||
.adc_gain_offset = -24,
|
||||
},
|
||||
.anc_cfg_fb_r =
|
||||
{
|
||||
.total_gain = 511,
|
||||
|
||||
.iir_coef[1].coef_b = {138909433, -267471808, 128584365},
|
||||
.iir_coef[1].coef_a = {134217728, -267471808, 133276071},
|
||||
.iir_bypass_flag = 0,
|
||||
.iir_counter = IIR_COUNTER_FB_R,
|
||||
|
||||
.iir_coef[2].coef_b = {134542733, -268138827, 133597115},
|
||||
.iir_coef[2].coef_a = {134217728, -268138827, 133922120},
|
||||
.iir_coef[0].coef_b = {26719020, -52852829, 26204379},
|
||||
.iir_coef[0].coef_a = {134217728, -210410903, 76474119},
|
||||
|
||||
.iir_coef[3].coef_b = {133541379, -264235686, 130815458},
|
||||
.iir_coef[3].coef_a = {134217728, -264235686, 130139109},
|
||||
.iir_coef[1].coef_b = {138909433, -267471808, 128584365},
|
||||
.iir_coef[1].coef_a = {134217728, -267471808, 133276071},
|
||||
|
||||
.iir_coef[4].coef_b = {0x8000000, 0, 0},
|
||||
.iir_coef[4].coef_a = {0x8000000, 0, 0},
|
||||
.iir_coef[2].coef_b = {134542733, -268138827, 133597115},
|
||||
.iir_coef[2].coef_a = {134217728, -268138827, 133922120},
|
||||
|
||||
.iir_coef[5].coef_b = {0x8000000, 0, 0},
|
||||
.iir_coef[5].coef_a = {0x8000000, 0, 0},
|
||||
.iir_coef[3].coef_b = {133541379, -264235686, 130815458},
|
||||
.iir_coef[3].coef_a = {134217728, -264235686, 130139109},
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset = 0,
|
||||
.adc_gain_offset = (0) * 4,
|
||||
},
|
||||
.iir_coef[4].coef_b = {0x8000000, 0, 0},
|
||||
.iir_coef[4].coef_a = {0x8000000, 0, 0},
|
||||
|
||||
.iir_coef[5].coef_b = {0x8000000, 0, 0},
|
||||
.iir_coef[5].coef_a = {0x8000000, 0, 0},
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset = 0,
|
||||
.adc_gain_offset = (2) * 4,
|
||||
},
|
||||
#if (AUD_SECTION_STRUCT_VERSION == 2)
|
||||
|
||||
/*
|
||||
/*
|
||||
|
||||
Filter1_B=[ 19847881, -39594823, 19747071];
|
||||
Filter1_A=[ 16777216, -33314517, 16538159];
|
||||
Filter1_B=[ 19847881, -39594823, 19747071];
|
||||
Filter1_A=[ 16777216, -33314517, 16538159];
|
||||
|
||||
Filter2_B=[ 9442890, -16603187, 7330251];
|
||||
Filter2_A=[ 16777216, -16603187, -4075];
|
||||
Filter2_B=[ 9442890, -16603187, 7330251];
|
||||
Filter2_A=[ 16777216, -16603187, -4075];
|
||||
|
||||
Filter3_B=[ 18107639, -32779315, 14701642];
|
||||
Filter3_A=[ 16777216, -32779315, 16032065];
|
||||
Filter3_B=[ 18107639, -32779315, 14701642];
|
||||
Filter3_A=[ 16777216, -32779315, 16032065];
|
||||
|
||||
Filter4_B=[ 12666347, -24058210, 11437046];
|
||||
Filter4_A=[ 16777216, -32089673, 15357640];
|
||||
Filter4_B=[ 12666347, -24058210, 11437046];
|
||||
Filter4_A=[ 16777216, -32089673, 15357640];
|
||||
|
||||
Filter5_B=[ 16466312, -31915122, 15523589];
|
||||
Filter5_A=[ 16777216, -31915122, 15212684];
|
||||
*/
|
||||
Filter5_B=[ 16466312, -31915122, 15523589];
|
||||
Filter5_A=[ 16777216, -31915122, 15212684];
|
||||
*/
|
||||
|
||||
.anc_cfg_mc_l =
|
||||
{
|
||||
.total_gain = 1228,
|
||||
.anc_cfg_mc_l =
|
||||
{
|
||||
.total_gain = 1228,
|
||||
|
||||
.iir_bypass_flag = 0,
|
||||
.iir_counter = 5,
|
||||
.iir_bypass_flag = 0,
|
||||
.iir_counter = 5,
|
||||
|
||||
.iir_coef[0].coef_b = {19847881, -39594823, 19747071},
|
||||
.iir_coef[0].coef_a = {16777216, -33314517, 16538159},
|
||||
.iir_coef[0].coef_b = {19847881, -39594823, 19747071},
|
||||
.iir_coef[0].coef_a = {16777216, -33314517, 16538159},
|
||||
|
||||
.iir_coef[1].coef_b = {9442890, -16603187, 7330251},
|
||||
.iir_coef[1].coef_a = {16777216, -16603187, -4075},
|
||||
.iir_coef[1].coef_b = {9442890, -16603187, 7330251},
|
||||
.iir_coef[1].coef_a = {16777216, -16603187, -4075},
|
||||
|
||||
.iir_coef[2].coef_b = {18107639, -32779315, 14701642},
|
||||
.iir_coef[2].coef_a = {16777216, -32779315, 16032065},
|
||||
.iir_coef[2].coef_b = {18107639, -32779315, 14701642},
|
||||
.iir_coef[2].coef_a = {16777216, -32779315, 16032065},
|
||||
|
||||
.iir_coef[3].coef_b = {12666347, -24058210, 11437046},
|
||||
.iir_coef[3].coef_a = {16777216, -32089673, 15357640},
|
||||
.iir_coef[3].coef_b = {12666347, -24058210, 11437046},
|
||||
.iir_coef[3].coef_a = {16777216, -32089673, 15357640},
|
||||
|
||||
.iir_coef[4].coef_b = {16466312, -31915122, 15523589},
|
||||
.iir_coef[4].coef_a = {16777216, -31915122, 15212684},
|
||||
.iir_coef[4].coef_b = {16466312, -31915122, 15523589},
|
||||
.iir_coef[4].coef_a = {16777216, -31915122, 15212684},
|
||||
|
||||
.iir_coef[5].coef_b = {0x8000000, 0, 0},
|
||||
.iir_coef[5].coef_a = {0x8000000, 0, 0},
|
||||
.iir_coef[5].coef_b = {0x8000000, 0, 0},
|
||||
.iir_coef[5].coef_a = {0x8000000, 0, 0},
|
||||
|
||||
.dac_gain_offset = 0,
|
||||
.adc_gain_offset = (0) * 4,
|
||||
},
|
||||
.anc_cfg_mc_r =
|
||||
{
|
||||
.total_gain = 1331,
|
||||
.dac_gain_offset = 0,
|
||||
.adc_gain_offset = (2) * 4,
|
||||
},
|
||||
.anc_cfg_mc_r =
|
||||
{
|
||||
.total_gain = 1331,
|
||||
|
||||
.iir_bypass_flag = 0,
|
||||
.iir_counter = 5,
|
||||
.iir_bypass_flag = 0,
|
||||
.iir_counter = 5,
|
||||
|
||||
.iir_coef[0].coef_b = {19847881, -39594823, 19747071},
|
||||
.iir_coef[0].coef_a = {16777216, -33314517, 16538159},
|
||||
.iir_coef[0].coef_b = {19847881, -39594823, 19747071},
|
||||
.iir_coef[0].coef_a = {16777216, -33314517, 16538159},
|
||||
|
||||
.iir_coef[1].coef_b = {9442890, -16603187, 7330251},
|
||||
.iir_coef[1].coef_a = {16777216, -16603187, -4075},
|
||||
.iir_coef[1].coef_b = {9442890, -16603187, 7330251},
|
||||
.iir_coef[1].coef_a = {16777216, -16603187, -4075},
|
||||
|
||||
.iir_coef[2].coef_b = {18107639, -32779315, 14701642},
|
||||
.iir_coef[2].coef_a = {16777216, -32779315, 16032065},
|
||||
.iir_coef[2].coef_b = {18107639, -32779315, 14701642},
|
||||
.iir_coef[2].coef_a = {16777216, -32779315, 16032065},
|
||||
|
||||
.iir_coef[3].coef_b = {12666347, -24058210, 11437046},
|
||||
.iir_coef[3].coef_a = {16777216, -32089673, 15357640},
|
||||
.iir_coef[3].coef_b = {12666347, -24058210, 11437046},
|
||||
.iir_coef[3].coef_a = {16777216, -32089673, 15357640},
|
||||
|
||||
.iir_coef[4].coef_b = {16466312, -31915122, 15523589},
|
||||
.iir_coef[4].coef_a = {16777216, -31915122, 15212684},
|
||||
.iir_coef[4].coef_b = {16466312, -31915122, 15523589},
|
||||
.iir_coef[4].coef_a = {16777216, -31915122, 15212684},
|
||||
|
||||
.iir_coef[5].coef_b = {0x8000000, 0, 0},
|
||||
.iir_coef[5].coef_a = {0x8000000, 0, 0},
|
||||
.iir_coef[5].coef_b = {0x8000000, 0, 0},
|
||||
.iir_coef[5].coef_a = {0x8000000, 0, 0},
|
||||
|
||||
.dac_gain_offset = 0,
|
||||
.adc_gain_offset = (0) * 4,
|
||||
},
|
||||
.dac_gain_offset = 0,
|
||||
.adc_gain_offset = (2) * 4,
|
||||
},
|
||||
#endif
|
||||
|
||||
};
|
||||
|
|
|
|||
|
|
@ -122,7 +122,7 @@ extern const struct AUD_IO_PATH_CFG_T cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_
|
|||
|
||||
#define CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV (AUD_CHANNEL_MAP_CH0)
|
||||
|
||||
#define CFG_HW_AUD_SIDETONE_MIC_DEV (AUD_CHANNEL_MAP_CH0)
|
||||
#define CFG_HW_AUD_SIDETONE_MIC_DEV (AUD_CHANNEL_MAP_CH4)
|
||||
#define CFG_HW_AUD_SIDETONE_GAIN_DBVAL (-20)
|
||||
|
||||
//bt config
|
||||
|
|
|
|||
|
|
@ -0,0 +1 @@
|
|||
target/
|
||||
|
|
@ -0,0 +1,119 @@
|
|||
# This file is automatically @generated by Cargo.
|
||||
# It is not intended for manual editing.
|
||||
version = 3
|
||||
|
||||
[[package]]
|
||||
name = "anc_decoder"
|
||||
version = "0.1.0"
|
||||
dependencies = [
|
||||
"declio",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "darling"
|
||||
version = "0.13.4"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "a01d95850c592940db9b8194bc39f4bc0e89dee5c4265e4b1807c34a9aba453c"
|
||||
dependencies = [
|
||||
"darling_core",
|
||||
"darling_macro",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "darling_core"
|
||||
version = "0.13.4"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "859d65a907b6852c9361e3185c862aae7fafd2887876799fa55f5f99dc40d610"
|
||||
dependencies = [
|
||||
"fnv",
|
||||
"ident_case",
|
||||
"proc-macro2",
|
||||
"quote",
|
||||
"strsim",
|
||||
"syn",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "darling_macro"
|
||||
version = "0.13.4"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "9c972679f83bdf9c42bd905396b6c3588a843a17f0f16dfcfa3e2c5d57441835"
|
||||
dependencies = [
|
||||
"darling_core",
|
||||
"quote",
|
||||
"syn",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "declio"
|
||||
version = "0.2.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "ae2d0ab09a05314050f1b66e78c2497af54dad2335e15b815f208d1594c85264"
|
||||
dependencies = [
|
||||
"declio_derive",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "declio_derive"
|
||||
version = "0.2.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "5eb284008990d1298ed56c741ca8823481789d72ff055031bf21ceaeb61c0053"
|
||||
dependencies = [
|
||||
"darling",
|
||||
"proc-macro2",
|
||||
"quote",
|
||||
"syn",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "fnv"
|
||||
version = "1.0.7"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "3f9eec918d3f24069decb9af1554cad7c880e2da24a9afd88aca000531ab82c1"
|
||||
|
||||
[[package]]
|
||||
name = "ident_case"
|
||||
version = "1.0.1"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "b9e0384b61958566e926dc50660321d12159025e767c18e043daf26b70104c39"
|
||||
|
||||
[[package]]
|
||||
name = "proc-macro2"
|
||||
version = "1.0.63"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "7b368fba921b0dce7e60f5e04ec15e565b3303972b42bcfde1d0713b881959eb"
|
||||
dependencies = [
|
||||
"unicode-ident",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "quote"
|
||||
version = "1.0.29"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "573015e8ab27661678357f27dc26460738fd2b6c86e46f386fde94cb5d913105"
|
||||
dependencies = [
|
||||
"proc-macro2",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "strsim"
|
||||
version = "0.10.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "73473c0e59e6d5812c5dfe2a064a6444949f089e20eec9a2e5506596494e4623"
|
||||
|
||||
[[package]]
|
||||
name = "syn"
|
||||
version = "1.0.109"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "72b64191b275b66ffe2469e8af2c1cfe3bafa67b529ead792a6d0160888b4237"
|
||||
dependencies = [
|
||||
"proc-macro2",
|
||||
"quote",
|
||||
"unicode-ident",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "unicode-ident"
|
||||
version = "1.0.10"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "22049a19f4a68748a168c0fc439f9516686aa045927ff767eca0a85101fb6e73"
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
[package]
|
||||
name = "anc_decoder"
|
||||
version = "0.1.0"
|
||||
edition = "2021"
|
||||
|
||||
# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
|
||||
|
||||
[dependencies]
|
||||
declio = "0.2.0"
|
||||
|
|
@ -0,0 +1,132 @@
|
|||
use declio::ctx::Endian;
|
||||
use declio::{Decode, Encode};
|
||||
use std::fs::File;
|
||||
use std::io::Read;
|
||||
//Super experimental dumb tooling for parsing out the ANC data
|
||||
// This is not production code, expect panics
|
||||
|
||||
const AUDIO_START: usize = 0x003EE000;
|
||||
const AUDIO_LEN: usize = 16;
|
||||
const AUD_IIR_NUM: usize = 8;
|
||||
const AUD_COEF_LEN: usize = 0;
|
||||
|
||||
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
|
||||
struct AudSectionHead {
|
||||
#[declio(ctx = "Endian::Little")]
|
||||
magic: u16,
|
||||
#[declio(ctx = "Endian::Little")]
|
||||
vesrion: u16,
|
||||
#[declio(ctx = "Endian::Little")]
|
||||
crc: u32,
|
||||
#[declio(ctx = "Endian::Little")]
|
||||
reserved0: u32,
|
||||
#[declio(ctx = "Endian::Little")]
|
||||
reserved1: u32,
|
||||
}
|
||||
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
|
||||
struct AudSectionBodyIdent {
|
||||
anc_ver: [u8; 16], // These are actually char* but honestly doesnt matter as seem to always be 0x00
|
||||
batch_info: [u8; 16], // These are actually char* but honestly doesnt matter as seem to always be 0x00
|
||||
serial: [u8; 16], // These are actually char* but honestly doesnt matter as seem to always be 0x00
|
||||
}
|
||||
|
||||
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
|
||||
struct anc_iir_coefs {
|
||||
#[declio(ctx = "Endian::Little")]
|
||||
coef_b: [i32; 3],
|
||||
#[declio(ctx = "Endian::Little")]
|
||||
coef_a: [i32; 3],
|
||||
}
|
||||
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
|
||||
struct aud_item {
|
||||
#[declio(ctx = "Endian::Little")]
|
||||
total_gain: u32,
|
||||
|
||||
#[declio(ctx = "Endian::Little")]
|
||||
iir_bypass_flag: u16,
|
||||
|
||||
#[declio(ctx = "Endian::Little")]
|
||||
iir_counter: u16,
|
||||
iir_coef: [anc_iir_coefs; AUD_IIR_NUM],
|
||||
|
||||
// #if (AUD_SECTION_STRUCT_VERSION == 1)
|
||||
// #[declio(ctx = "Endian::Little")]
|
||||
// fir_bypass_flag: u16,
|
||||
// #[declio(ctx = "Endian::Little")]
|
||||
// fir_len: u16,
|
||||
// #[declio(ctx = "Endian::Little")]
|
||||
// fir_coef: [i16; AUD_COEF_LEN],
|
||||
// pos_tab: [i8; 16],
|
||||
// #elif (AUD_SECTION_STRUCT_VERSION == 2)
|
||||
#[declio(ctx = "Endian::Little")]
|
||||
reserved_for_drc: [u32; 32],
|
||||
// #elif (AUD_SECTION_STRUCT_VERSION == 3)
|
||||
|
||||
// #endif
|
||||
#[declio(ctx = "Endian::Little")]
|
||||
reserved1: i16,
|
||||
dac_gain_offset: i8, // in qdb (quater of dB)
|
||||
adc_gain_offset: i8, // in qdb (quater of dB)
|
||||
}
|
||||
|
||||
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
|
||||
struct struct_anc_cfg {
|
||||
//V1+
|
||||
anc_cfg_ff_l: aud_item,
|
||||
anc_cfg_ff_r: aud_item,
|
||||
anc_cfg_fb_l: aud_item,
|
||||
anc_cfg_fb_r: aud_item,
|
||||
//V2
|
||||
anc_cfg_tt_l: aud_item,
|
||||
anc_cfg_tt_r: aud_item,
|
||||
anc_cfg_mc_l: aud_item,
|
||||
anc_cfg_mc_r: aud_item,
|
||||
}
|
||||
|
||||
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
|
||||
struct pctool_struct_anc_cfg {
|
||||
//
|
||||
anc_cfg: [struct_anc_cfg; 2], //0 == 41k, 2==44k
|
||||
}
|
||||
|
||||
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
|
||||
struct AudSectionBodyConfig {
|
||||
anc_config_arr: [pctool_struct_anc_cfg; 1], // we may only use first of 4 entries
|
||||
}
|
||||
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
|
||||
struct AudSectionBody {
|
||||
anc_ident: AudSectionBodyIdent,
|
||||
anc_config: AudSectionBodyConfig,
|
||||
}
|
||||
#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]
|
||||
struct PctoolAudSection {
|
||||
header: AudSectionHead,
|
||||
body: AudSectionBody,
|
||||
}
|
||||
|
||||
fn main() {
|
||||
println!("Super dumb anc firmware details dumper");
|
||||
println!("By Ralim <ralim@ralimtek.com>");
|
||||
println!("Reading firmware.bin");
|
||||
let file_contents = get_firmware_file("firmware.bin");
|
||||
println!("Running decoder");
|
||||
|
||||
let dummy_init: PctoolAudSection = PctoolAudSection::default();
|
||||
let dummy_serialised = declio::to_bytes(dummy_init).unwrap();
|
||||
|
||||
let decoded: PctoolAudSection =
|
||||
declio::from_bytes(&file_contents[AUDIO_START..AUDIO_START + dummy_serialised.len()])
|
||||
.expect("decode failed");
|
||||
|
||||
println!("Decoded {:#?}", decoded)
|
||||
}
|
||||
|
||||
fn get_firmware_file(filename: &str) -> Vec<u8> {
|
||||
let mut f = File::open(&filename).expect("no file found");
|
||||
let mut buffer = Vec::new();
|
||||
|
||||
// read the whole file
|
||||
f.read_to_end(&mut buffer).expect("could not read file");
|
||||
|
||||
buffer
|
||||
}
|
||||
|
|
@ -123,7 +123,7 @@
|
|||
#endif
|
||||
|
||||
#ifndef ANC_VMIC_CFG
|
||||
#warning "No ANC VMIC configured"
|
||||
#error "No ANC VMIC configured"
|
||||
#define ANC_VMIC_CFG (AUD_VMIC_MAP_VMIC1)
|
||||
#endif
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue