Drop SDMMC
This commit is contained in:
Ben V. Brown
parent
5ceb23bef1
commit
4e8ec04b34
|
|
@ -12,9 +12,6 @@ obj-y += btusbaudio/
|
|||
obj-y += usbaudio/
|
||||
endif
|
||||
|
||||
ifeq ($(APP_TEST_SDMMC),1)
|
||||
obj-y += sdmmc/
|
||||
endif
|
||||
|
||||
ifeq ($(ANC_APP),1)
|
||||
obj-y += anc/
|
||||
|
|
@ -35,7 +32,6 @@ endif
|
|||
subdir-ccflags-y += -Iapps/apptester \
|
||||
-Iapps/audioplayers \
|
||||
-Iapps/common \
|
||||
-Iapps/sdmmc \
|
||||
-Iapps/main \
|
||||
-Iapps/cmd \
|
||||
-Iapps/key \
|
||||
|
|
|
|||
|
|
@ -1,14 +0,0 @@
|
|||
cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))
|
||||
|
||||
obj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))
|
||||
obj-y := $(obj-y:.c=.o)
|
||||
obj-y := $(obj-y:.cpp=.o)
|
||||
obj-y := $(obj-y:.S=.o)
|
||||
|
||||
subdir-ccflags-y += -Iservices/fs/sd \
|
||||
-Iservices/fs/fat \
|
||||
-Iservices/fs/fat/ChaN
|
||||
|
||||
ifeq ($(APP_TEST_SDMMC),1)
|
||||
ccflags-y += -D__APP_TEST_SDMMC__
|
||||
endif
|
||||
|
|
@ -1,186 +0,0 @@
|
|||
/***************************************************************************
|
||||
*
|
||||
* Copyright 2015-2019 BES.
|
||||
* All rights reserved. All unpublished rights reserved.
|
||||
*
|
||||
* No part of this work may be used or reproduced in any form or by any
|
||||
* means, or stored in a database or retrieval system, without prior written
|
||||
* permission of BES.
|
||||
*
|
||||
* Use of this work is governed by a license granted by BES.
|
||||
* This work contains confidential and proprietary information of
|
||||
* BES. which is protected by copyright, trade secret,
|
||||
* trademark and other intellectual property rights.
|
||||
*
|
||||
****************************************************************************/
|
||||
#include "cmsis_os.h"
|
||||
#include "hal_trace.h"
|
||||
//#include "app_thread.h"
|
||||
|
||||
//#include "hal_sdmmc.h"
|
||||
#include "SDFileSystem.h"
|
||||
#include "app_sdmmc.h"
|
||||
#include "audiobuffer.h"
|
||||
#include "audioflinger.h"
|
||||
|
||||
#define APP_TEST_PLAYBACK_BUFF_SIZE (120 * 20)
|
||||
#define APP_TEST_CAPTURE_BUFF_SIZE (120 * 20)
|
||||
extern uint8_t app_test_playback_buff[APP_TEST_PLAYBACK_BUFF_SIZE]
|
||||
__attribute__((aligned(4)));
|
||||
extern uint8_t app_test_capture_buff[APP_TEST_CAPTURE_BUFF_SIZE]
|
||||
__attribute__((aligned(4)));
|
||||
SDFileSystem sdfs("sd");
|
||||
|
||||
int sd_open() {
|
||||
DIR *d = opendir("/sd");
|
||||
if (!d) {
|
||||
TRACE(0, "sd file system borked\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
TRACE(0, "---------root---------\n");
|
||||
struct dirent *p;
|
||||
while ((p = readdir(d))) {
|
||||
int len = sizeof(dirent);
|
||||
TRACE(2, "%s %d\n", p->d_name, len);
|
||||
}
|
||||
closedir(d);
|
||||
TRACE(0, "--------root end-------\n");
|
||||
}
|
||||
|
||||
extern uint32_t play_wav_file(char *file_path);
|
||||
extern uint32_t stop_wav_file(void);
|
||||
extern uint32_t wav_file_audio_more_data(uint8_t *buf, uint32_t len);
|
||||
|
||||
void test_wave_play(bool on) {
|
||||
struct AF_STREAM_CONFIG_T stream_cfg;
|
||||
uint32_t reallen;
|
||||
uint32_t totalreadsize;
|
||||
uint32_t stime, etime;
|
||||
|
||||
char wave[] = "/sd/test_music.wav";
|
||||
|
||||
static bool isRun = false;
|
||||
|
||||
if (isRun == on)
|
||||
return;
|
||||
else
|
||||
isRun = on;
|
||||
|
||||
TRACE(2, "%s %d\n", __func__, on);
|
||||
memset(&stream_cfg, 0, sizeof(stream_cfg));
|
||||
if (on) {
|
||||
play_wav_file(wave);
|
||||
|
||||
stream_cfg.bits = AUD_BITS_16;
|
||||
stream_cfg.channel_num = AUD_CHANNEL_NUM_2;
|
||||
stream_cfg.sample_rate = AUD_SAMPRATE_48000;
|
||||
|
||||
stream_cfg.device = AUD_STREAM_USE_INT_CODEC;
|
||||
stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;
|
||||
stream_cfg.vol = 0x03;
|
||||
|
||||
stream_cfg.handler = wav_file_audio_more_data;
|
||||
stream_cfg.data_ptr = app_test_playback_buff;
|
||||
stream_cfg.data_size = APP_TEST_PLAYBACK_BUFF_SIZE;
|
||||
|
||||
af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);
|
||||
af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);
|
||||
} else {
|
||||
stop_wav_file();
|
||||
af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);
|
||||
af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
FIL pcm_fil;
|
||||
FRESULT pcm_res;
|
||||
UINT pcm_num;
|
||||
uint32_t pcm_save_more_data(uint8_t *buf, uint32_t len) {
|
||||
// TRACE(2,"%s\n len:%d", __func__, len);
|
||||
|
||||
audio_buffer_set_stereo2mono_16bits(buf, len, 1);
|
||||
pcm_res = f_write(&pcm_fil, (uint8_t *)buf, len >> 1, &pcm_num);
|
||||
if (pcm_res != FR_OK) {
|
||||
TRACE(2, "[%s]:error-->res = %d", __func__, pcm_res);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
void ad_tester(bool run) {
|
||||
char filename[] = "/sd/audio_dump.bin";
|
||||
|
||||
struct AF_STREAM_CONFIG_T stream_cfg;
|
||||
|
||||
TRACE(2, "%s %d\n", __func__, run);
|
||||
|
||||
if (run) {
|
||||
memset(&stream_cfg, 0, sizeof(stream_cfg));
|
||||
pcm_res = f_open(&pcm_fil, "test2.bin", FA_CREATE_ALWAYS | FA_WRITE);
|
||||
if (pcm_res) {
|
||||
TRACE(2, "[%s]:Cannot creat test2.bin...%d", __func__, pcm_res);
|
||||
return;
|
||||
}
|
||||
|
||||
stream_cfg.bits = AUD_BITS_16;
|
||||
stream_cfg.channel_num = AUD_CHANNEL_NUM_2;
|
||||
stream_cfg.sample_rate = AUD_SAMPRATE_48000;
|
||||
|
||||
stream_cfg.device = AUD_STREAM_USE_INT_CODEC;
|
||||
stream_cfg.io_path = AUD_INPUT_PATH_MAINMIC;
|
||||
stream_cfg.vol = 0x03;
|
||||
|
||||
stream_cfg.handler = pcm_save_more_data;
|
||||
stream_cfg.data_ptr = app_test_playback_buff;
|
||||
stream_cfg.data_size = APP_TEST_PLAYBACK_BUFF_SIZE;
|
||||
|
||||
af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, &stream_cfg);
|
||||
af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);
|
||||
} else {
|
||||
af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);
|
||||
af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);
|
||||
osDelay(1000);
|
||||
|
||||
f_close(&pcm_fil);
|
||||
}
|
||||
}
|
||||
|
||||
// if dump data into sd, buffer length should make sd card speed enough
|
||||
// Bench32.exe can test sd card speed in PC, then make sure bufer length, buffer
|
||||
// length < 16k(sd driver)
|
||||
void dump_data2sd(enum APP_SDMMC_DUMP_T opt, uint8_t *buf, uint32_t len) {
|
||||
static FIL sd_fil;
|
||||
FRESULT res;
|
||||
|
||||
ASSERT(opt < APP_SDMMC_DUMP_NUM, "[%s] opt(%d) >= APP_SDMMC_DUMP_NUM",
|
||||
__func__, opt);
|
||||
|
||||
if (opt == APP_SDMMC_DUMP_OPEN) {
|
||||
// res = f_open(&sd_fil,"dump.bin",FA_CREATE_ALWAYS | FA_WRITE);
|
||||
res = f_open(&sd_fil, "test.txt", FA_READ);
|
||||
|
||||
// ASSERT(pcm_res == FR_OK,"[%s]:Cannot creat dump.bin, res =
|
||||
// %d",__func__, pcm_res);
|
||||
}
|
||||
if (opt == APP_SDMMC_DUMP_READ) {
|
||||
res = f_read(&sd_fil, buf, len, &pcm_num);
|
||||
|
||||
// ASSERT(pcm_res == FR_OK,"[%s]:Cannot creat dump.bin, res =
|
||||
// %d",__func__, pcm_res);
|
||||
} else if (opt == APP_SDMMC_DUMP_WRITE) {
|
||||
res = f_write(&sd_fil, buf, len, &pcm_num);
|
||||
|
||||
// ASSERT(pcm_res == FR_OK,"[%s]:Write dump.bin failed, res = %d",
|
||||
// __func__, pcm_res);
|
||||
} else if (opt == APP_SDMMC_DUMP_CLOSE) {
|
||||
res = f_close(&sd_fil);
|
||||
}
|
||||
|
||||
if (res == FR_OK) {
|
||||
TRACE(3, "[%s] SUCESS: opt = %d, res = %d", __func__, opt, res);
|
||||
} else {
|
||||
TRACE(3, "[%s] ERROR: opt = %d, res = %d", __func__, opt, res);
|
||||
}
|
||||
}
|
||||
|
|
@ -1,39 +0,0 @@
|
|||
/***************************************************************************
|
||||
*
|
||||
* Copyright 2015-2019 BES.
|
||||
* All rights reserved. All unpublished rights reserved.
|
||||
*
|
||||
* No part of this work may be used or reproduced in any form or by any
|
||||
* means, or stored in a database or retrieval system, without prior written
|
||||
* permission of BES.
|
||||
*
|
||||
* Use of this work is governed by a license granted by BES.
|
||||
* This work contains confidential and proprietary information of
|
||||
* BES. which is protected by copyright, trade secret,
|
||||
* trademark and other intellectual property rights.
|
||||
*
|
||||
****************************************************************************/
|
||||
#ifndef __APP_SDMMC_H__
|
||||
#define __APP_SDMMC_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
enum APP_SDMMC_DUMP_T{
|
||||
APP_SDMMC_DUMP_OPEN = 0,
|
||||
APP_SDMMC_DUMP_READ,
|
||||
APP_SDMMC_DUMP_WRITE,
|
||||
APP_SDMMC_DUMP_CLOSE,
|
||||
APP_SDMMC_DUMP_NUM
|
||||
};
|
||||
|
||||
int sd_open();
|
||||
|
||||
void dump_data2sd(enum APP_SDMMC_DUMP_T opt, uint8_t *buf, uint32_t len);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif//__FMDEC_H__
|
||||
|
|
@ -1826,7 +1826,6 @@ PERPH_SET_DIV_FUNC(uart1, UART1, UART_CLK);
|
|||
PERPH_SET_DIV_FUNC(uart2, UART2, UART_CLK);
|
||||
PERPH_SET_DIV_FUNC(spi, SPI1, SYS_DIV);
|
||||
PERPH_SET_DIV_FUNC(slcd, SPI0, SYS_DIV);
|
||||
PERPH_SET_DIV_FUNC(sdmmc, SDMMC, PERIPH_CLK);
|
||||
PERPH_SET_DIV_FUNC(i2c, I2C, I2C_CLK);
|
||||
|
||||
#define PERPH_SET_FREQ_FUNC(f, F, r) \
|
||||
|
|
@ -1851,7 +1850,6 @@ PERPH_SET_FREQ_FUNC(uart1, UART1, UART_CLK);
|
|||
PERPH_SET_FREQ_FUNC(uart2, UART2, UART_CLK);
|
||||
PERPH_SET_FREQ_FUNC(spi, SPI1, SYS_DIV);
|
||||
PERPH_SET_FREQ_FUNC(slcd, SPI0, SYS_DIV);
|
||||
PERPH_SET_FREQ_FUNC(sdmmc, SDMMC, PERIPH_CLK);
|
||||
PERPH_SET_FREQ_FUNC(i2c, I2C, I2C_CLK);
|
||||
|
||||
int hal_cmu_ispi_set_freq(enum HAL_CMU_PERIPH_FREQ_T freq) {
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,46 +0,0 @@
|
|||
/***************************************************************************
|
||||
*
|
||||
* Copyright 2015-2019 BES.
|
||||
* All rights reserved. All unpublished rights reserved.
|
||||
*
|
||||
* No part of this work may be used or reproduced in any form or by any
|
||||
* means, or stored in a database or retrieval system, without prior written
|
||||
* permission of BES.
|
||||
*
|
||||
* Use of this work is governed by a license granted by BES.
|
||||
* This work contains confidential and proprietary information of
|
||||
* BES. which is protected by copyright, trade secret,
|
||||
* trademark and other intellectual property rights.
|
||||
*
|
||||
****************************************************************************/
|
||||
#ifndef _HAL_SDMMC_H_
|
||||
#define _HAL_SDMMC_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "plat_types.h"
|
||||
|
||||
enum HAL_SDMMC_ID_T {
|
||||
HAL_SDMMC_ID_0 = 0,
|
||||
HAL_SDMMC_ID_NUM,
|
||||
};
|
||||
|
||||
typedef void (*HAL_SDMMC_DELAY_FUNC)(uint32_t ms);
|
||||
|
||||
/* hal api */
|
||||
HAL_SDMMC_DELAY_FUNC hal_sdmmc_set_delay_func(HAL_SDMMC_DELAY_FUNC new_func);
|
||||
int32_t hal_sdmmc_open(enum HAL_SDMMC_ID_T id);
|
||||
void hal_sdmmc_info(enum HAL_SDMMC_ID_T id, uint32_t *sector_count, uint32_t *sector_size);
|
||||
uint32_t hal_sdmmc_read_blocks(enum HAL_SDMMC_ID_T id, uint32_t start_block, uint32_t block_count, uint8_t* dest);
|
||||
uint32_t hal_sdmmc_write_blocks(enum HAL_SDMMC_ID_T id, uint32_t start_block, uint32_t block_count, uint8_t* src);
|
||||
void hal_sdmmc_close(enum HAL_SDMMC_ID_T id);
|
||||
void hal_sdmmc_dump(enum HAL_SDMMC_ID_T id);
|
||||
int hal_sdmmc_enable_detecter(enum HAL_SDMMC_ID_T id,void (* cb)(uint8_t));
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _HAL_SDMMC_H_ */
|
||||
|
|
@ -1,149 +0,0 @@
|
|||
/***************************************************************************
|
||||
*
|
||||
* Copyright 2015-2019 BES.
|
||||
* All rights reserved. All unpublished rights reserved.
|
||||
*
|
||||
* No part of this work may be used or reproduced in any form or by any
|
||||
* means, or stored in a database or retrieval system, without prior written
|
||||
* permission of BES.
|
||||
*
|
||||
* Use of this work is governed by a license granted by BES.
|
||||
* This work contains confidential and proprietary information of
|
||||
* BES. which is protected by copyright, trade secret,
|
||||
* trademark and other intellectual property rights.
|
||||
*
|
||||
****************************************************************************/
|
||||
#ifndef __SDMMCIP_REG_HW_H
|
||||
#define __SDMMCIP_REG_HW_H
|
||||
|
||||
#include "plat_types.h"
|
||||
|
||||
#define SDMMCIP_REG_CTRL 0x000
|
||||
#define SDMMCIP_REG_PWREN 0x004
|
||||
#define SDMMCIP_REG_CLKDIV 0x008
|
||||
#define SDMMCIP_REG_CLKSRC 0x00C
|
||||
#define SDMMCIP_REG_CLKENA 0x010
|
||||
#define SDMMCIP_REG_TMOUT 0x014
|
||||
#define SDMMCIP_REG_CTYPE 0x018
|
||||
#define SDMMCIP_REG_BLKSIZ 0x01C
|
||||
#define SDMMCIP_REG_BYTCNT 0x020
|
||||
#define SDMMCIP_REG_INTMASK 0x024
|
||||
#define SDMMCIP_REG_CMDARG 0x028
|
||||
#define SDMMCIP_REG_CMD 0x02C
|
||||
#define SDMMCIP_REG_RESP0 0x030
|
||||
#define SDMMCIP_REG_RESP1 0x034
|
||||
#define SDMMCIP_REG_RESP2 0x038
|
||||
#define SDMMCIP_REG_RESP3 0x03C
|
||||
#define SDMMCIP_REG_MINTSTS 0x040
|
||||
#define SDMMCIP_REG_RINTSTS 0x044
|
||||
#define SDMMCIP_REG_STATUS 0x048
|
||||
#define SDMMCIP_REG_FIFOTH 0x04C
|
||||
#define SDMMCIP_REG_CDETECT 0x050
|
||||
#define SDMMCIP_REG_WRTPRT 0x054
|
||||
#define SDMMCIP_REG_GPIO 0x058
|
||||
#define SDMMCIP_REG_TCMCNT 0x05C
|
||||
#define SDMMCIP_REG_TBBCNT 0x060
|
||||
#define SDMMCIP_REG_DEBNCE 0x064
|
||||
#define SDMMCIP_REG_USRID 0x068
|
||||
#define SDMMCIP_REG_VERID 0x06C
|
||||
#define SDMMCIP_REG_HCON 0x070
|
||||
#define SDMMCIP_REG_UHS_REG 0x074
|
||||
#define SDMMCIP_REG_RESET_CARD 0x078
|
||||
#define SDMMCIP_REG_BMOD 0x080
|
||||
#define SDMMCIP_REG_PLDMND 0x084
|
||||
#define SDMMCIP_REG_DBADDR 0x088
|
||||
#define SDMMCIP_REG_IDSTS 0x08C
|
||||
#define SDMMCIP_REG_IDINTEN 0x090
|
||||
#define SDMMCIP_REG_DSCADDR 0x094
|
||||
#define SDMMCIP_REG_BUFADDR 0x098
|
||||
#define SDMMCIP_REG_DATA 0x200
|
||||
|
||||
/* Interrupt Mask register */
|
||||
#define SDMMCIP_REG_INTMSK_ALL 0xffffffff
|
||||
#define SDMMCIP_REG_INTMSK_CD (1 << 0)
|
||||
#define SDMMCIP_REG_INTMSK_RE (1 << 1)
|
||||
#define SDMMCIP_REG_INTMSK_CDONE (1 << 2)
|
||||
#define SDMMCIP_REG_INTMSK_DTO (1 << 3)
|
||||
#define SDMMCIP_REG_INTMSK_TXDR (1 << 4)
|
||||
#define SDMMCIP_REG_INTMSK_RXDR (1 << 5)
|
||||
#define SDMMCIP_REG_INTMSK_DCRC (1 << 7)
|
||||
#define SDMMCIP_REG_INTMSK_RTO (1 << 8)
|
||||
#define SDMMCIP_REG_INTMSK_DRTO (1 << 9)
|
||||
#define SDMMCIP_REG_INTMSK_HTO (1 << 10)
|
||||
#define SDMMCIP_REG_INTMSK_FRUN (1 << 11)
|
||||
#define SDMMCIP_REG_INTMSK_HLE (1 << 12)
|
||||
#define SDMMCIP_REG_INTMSK_SBE (1 << 13)
|
||||
#define SDMMCIP_REG_INTMSK_ACD (1 << 14)
|
||||
#define SDMMCIP_REG_INTMSK_EBE (1 << 15)
|
||||
|
||||
/* Raw interrupt Regsiter */
|
||||
#define SDMMCIP_REG_DATA_ERR (SDMMCIP_REG_INTMSK_EBE | SDMMCIP_REG_INTMSK_SBE | SDMMCIP_REG_INTMSK_HLE |\
|
||||
SDMMCIP_REG_INTMSK_FRUN | SDMMCIP_REG_INTMSK_EBE | SDMMCIP_REG_INTMSK_DCRC)
|
||||
#define SDMMCIP_REG_DATA_TOUT (SDMMCIP_REG_INTMSK_HTO | SDMMCIP_REG_INTMSK_DRTO)
|
||||
/* CTRL register */
|
||||
#define SDMMCIP_REG_CTRL_RESET (1 << 0)
|
||||
#define SDMMCIP_REG_CTRL_FIFO_RESET (1 << 1)
|
||||
#define SDMMCIP_REG_CTRL_DMA_RESET (1 << 2)
|
||||
#define SDMMCIP_REG_INT_EN (1 << 4)
|
||||
#define SDMMCIP_REG_DMA_EN (1 << 5)
|
||||
#define SDMMCIP_REG_CTRL_SEND_AS_CCSD (1 << 10)
|
||||
#define SDMMCIP_REG_IDMAC_EN (1 << 25)
|
||||
#define SDMMCIP_REG_RESET_ALL (SDMMCIP_REG_CTRL_RESET | SDMMCIP_REG_CTRL_FIFO_RESET |\
|
||||
SDMMCIP_REG_CTRL_DMA_RESET)
|
||||
|
||||
/* CMD register */
|
||||
#define SDMMCIP_REG_CMD_RESP_EXP (1 << 6)
|
||||
#define SDMMCIP_REG_CMD_RESP_LENGTH (1 << 7)
|
||||
#define SDMMCIP_REG_CMD_CHECK_CRC (1 << 8)
|
||||
#define SDMMCIP_REG_CMD_DATA_EXP (1 << 9)
|
||||
#define SDMMCIP_REG_CMD_RW (1 << 10)
|
||||
#define SDMMCIP_REG_CMD_SEND_STOP (1 << 12)
|
||||
#define SDMMCIP_REG_CMD_ABORT_STOP (1 << 14)
|
||||
#define SDMMCIP_REG_CMD_PRV_DAT_WAIT (1 << 13)
|
||||
#define SDMMCIP_REG_CMD_UPD_CLK (1 << 21)
|
||||
#define SDMMCIP_REG_CMD_USE_HOLD_REG (1 << 29)
|
||||
#define SDMMCIP_REG_CMD_START (1 << 31)
|
||||
|
||||
/* CLKENA register */
|
||||
#define SDMMCIP_REG_CLKEN_ENABLE (1 << 0)
|
||||
#define SDMMCIP_REG_CLKEN_LOW_PWR (1 << 16)
|
||||
|
||||
/* Card-type registe */
|
||||
#define SDMMCIP_REG_CTYPE_1BIT 0
|
||||
#define SDMMCIP_REG_CTYPE_4BIT (1 << 0)
|
||||
#define SDMMCIP_REG_CTYPE_8BIT (1 << 16)
|
||||
|
||||
/* Status Register */
|
||||
#define SDMMCIP_REG_BUSY (1 << 9)
|
||||
#define SDMMCIP_REG_FIFO_FULL (1 << 3)
|
||||
#define SDMMCIP_REG_FIFO_EMPTY (1 << 2)
|
||||
#define SDMMCIP_REG_FIFO_COUNT_SHIFT (17)
|
||||
#define SDMMCIP_REG_FIFO_COUNT_MASK (0x1fff << SDMMCIP_REG_FIFO_COUNT_SHIFT)
|
||||
|
||||
/* FIFOTH Register */
|
||||
#define MSIZE(x) ((x) << 28)
|
||||
#define RX_WMARK(x) ((x) << 16)
|
||||
#define TX_WMARK(x) (x)
|
||||
#define RX_WMARK_SHIFT 16
|
||||
#define RX_WMARK_MASK (0xfff << RX_WMARK_SHIFT)
|
||||
|
||||
#define SDMMCIP_REG_IDMAC_OWN (1 << 31)
|
||||
#define SDMMCIP_REG_IDMAC_CH (1 << 4)
|
||||
#define SDMMCIP_REG_IDMAC_FS (1 << 3)
|
||||
#define SDMMCIP_REG_IDMAC_LD (1 << 2)
|
||||
|
||||
/* Bus Mode Register */
|
||||
#define SDMMCIP_REG_BMOD_IDMAC_RESET (1 << 0)
|
||||
#define SDMMCIP_REG_BMOD_IDMAC_FB (1 << 1)
|
||||
#define SDMMCIP_REG_BMOD_IDMAC_EN (1 << 7)
|
||||
|
||||
/* UHS register */
|
||||
#define SDMMCIP_REG_DDR_MODE (1 << 16)
|
||||
|
||||
/* quirks */
|
||||
#define SDMMCIP_REG_QUIRK_DISABLE_SMU (1 << 0)
|
||||
|
||||
/* FIFO Register */
|
||||
#define SDMMCIP_REG_FIFO_OFFSET 0x200
|
||||
|
||||
#endif /* __SDMMCIP_REG_HW_H */
|
||||
Loading…
Reference in New Issue