add anc on and off
This commit is contained in:
dylancaowugang
parent
fa0f605825
commit
29b195e12d
|
|
@ -376,8 +376,7 @@ int app_battery_handle_process_charging(uint32_t status, union APP_BATTERY_MSG_
|
|||
#else
|
||||
#if CHARGER_PLUGINOUT_RESET
|
||||
TRACE(0,"CHARGING-->RESET");
|
||||
osTimerStop(app_battery_timer);
|
||||
app_shutdown();
|
||||
app_reset();
|
||||
#else
|
||||
app_battery_measure.status = APP_BATTERY_STATUS_NORMAL;
|
||||
#endif
|
||||
|
|
|
|||
1
build.sh
1
build.sh
|
|
@ -1,5 +1,6 @@
|
|||
#make -j T=2300_open_source DEBUG=1 > log.txt 2>&1
|
||||
make -j T=open_source DEBUG=1 > log.txt 2>&1
|
||||
#make -j T=best2300p_ibrt_anc DEBUG=1 > log.txt 2>&1
|
||||
|
||||
if [ $? -eq 0 ];then
|
||||
echo "build success"
|
||||
|
|
|
|||
|
|
@ -0,0 +1,435 @@
|
|||
CHIP ?= best2300p
|
||||
|
||||
DEBUG ?= 1
|
||||
|
||||
FPGA ?= 0
|
||||
|
||||
MBED ?= 0
|
||||
|
||||
RTOS ?= 1
|
||||
|
||||
#KERNEL ?= FREERTOS
|
||||
|
||||
|
||||
LIBC_ROM ?= 1
|
||||
|
||||
export USER_SECURE_BOOT ?= 0
|
||||
# enable:1
|
||||
# disable:0
|
||||
|
||||
WATCHER_DOG ?= 0
|
||||
|
||||
DEBUG_PORT ?= 1
|
||||
# 0: usb
|
||||
# 1: uart0
|
||||
# 2: uart1
|
||||
|
||||
FLASH_CHIP ?= ALL
|
||||
# GD25Q80C
|
||||
# GD25Q32C
|
||||
# ALL
|
||||
|
||||
export NO_TRACE_TIME_STAMP ?=1
|
||||
|
||||
export FORCE_SIGNALINGMODE ?= 0
|
||||
|
||||
export FORCE_NOSIGNALINGMODE ?= 0
|
||||
|
||||
export FORCE_SCO_MAX_RETX ?= 0
|
||||
|
||||
export FA_RX_GAIN_CTRL ?= 1
|
||||
|
||||
export BT_FA_ECC ?= 0
|
||||
|
||||
export CONTROLLER_DUMP_ENABLE ?= 0
|
||||
|
||||
export CONTROLLER_MEM_LOG_ENABLE ?= 0
|
||||
|
||||
export INTERSYS_DEBUG ?= 1
|
||||
|
||||
export PROFILE_DEBUG ?= 0
|
||||
|
||||
export BTDUMP_ENABLE ?= 0
|
||||
|
||||
export BT_DEBUG_TPORTS ?= 0
|
||||
|
||||
TPORTS_KEY_COEXIST ?= 0
|
||||
|
||||
export SNIFF_MODE_CHECK ?= 0
|
||||
|
||||
AUDIO_OUTPUT_MONO ?= 0
|
||||
|
||||
AUDIO_OUTPUT_DIFF ?= 0
|
||||
|
||||
#### ANC DEFINE START ######
|
||||
export ANC_APP ?= 1
|
||||
export ANC_FF_ENABLED ?= 1
|
||||
export ANC_FB_ENABLED ?= 1
|
||||
export AUDIO_ANC_FB_MC ?= 0
|
||||
export AUDIO_SECTION_SUPPT ?= 0
|
||||
export AUD_SECTION_STRUCT_VERSION ?= 2
|
||||
export AUDIO_ANC_FB_MC_HW ?=0
|
||||
export APP_ANC_KEY ?= 0
|
||||
export ANC_FB_CHECK ?= 1
|
||||
##### ANC DEFINE END ######
|
||||
|
||||
APP_ANC_TEST ?= 0
|
||||
|
||||
TEST_OVER_THE_AIR ?= 0
|
||||
|
||||
HW_FIR_EQ_PROCESS ?= 0
|
||||
|
||||
SW_IIR_EQ_PROCESS ?= 1
|
||||
|
||||
HW_DAC_IIR_EQ_PROCESS ?= 0
|
||||
|
||||
HW_IIR_EQ_PROCESS ?= 0
|
||||
|
||||
HW_DC_FILTER_WITH_IIR ?= 0
|
||||
|
||||
AUDIO_DRC ?= 0
|
||||
|
||||
AUDIO_DRC2 ?= 0
|
||||
|
||||
PC_CMD_UART ?= 0
|
||||
|
||||
AUDIO_SECTION_ENABLE ?= 0
|
||||
|
||||
AUDIO_RESAMPLE ?= 1
|
||||
|
||||
RESAMPLE_ANY_SAMPLE_RATE ?= 1
|
||||
|
||||
OSC_26M_X4_AUD2BB ?= 1
|
||||
|
||||
AUDIO_OUTPUT_VOLUME_DEFAULT ?= 12
|
||||
# range:1~16
|
||||
|
||||
AUDIO_INPUT_CAPLESSMODE ?= 0
|
||||
|
||||
AUDIO_INPUT_LARGEGAIN ?= 0
|
||||
|
||||
AUDIO_CODEC_ASYNC_CLOSE ?= 0
|
||||
|
||||
AUDIO_SCO_BTPCM_CHANNEL ?= 1
|
||||
|
||||
export A2DP_CP_ACCEL ?= 1
|
||||
|
||||
export SCO_CP_ACCEL ?= 1
|
||||
|
||||
export SCO_TRACE_CP_ACCEL ?= 0
|
||||
|
||||
# For TWS SCO DMA snapshot and low delay
|
||||
export PCM_FAST_MODE ?= 1
|
||||
|
||||
export CVSD_BYPASS ?= 1
|
||||
|
||||
export LOW_DELAY_SCO ?= 0
|
||||
|
||||
SPEECH_TX_DC_FILTER ?= 1
|
||||
|
||||
SPEECH_TX_AEC2FLOAT ?= 0
|
||||
|
||||
SPEECH_TX_NS3 ?= 0
|
||||
|
||||
SPEECH_TX_2MIC_NS2 ?= 0
|
||||
|
||||
SPEECH_TX_COMPEXP ?= 1
|
||||
|
||||
SPEECH_TX_EQ ?= 0
|
||||
|
||||
SPEECH_TX_POST_GAIN ?= 0
|
||||
|
||||
SPEECH_RX_NS2FLOAT ?= 0
|
||||
|
||||
SPEECH_RX_EQ ?= 0
|
||||
|
||||
SPEECH_RX_POST_GAIN ?= 0
|
||||
|
||||
LARGE_RAM ?= 1
|
||||
|
||||
HSP_ENABLE ?= 0
|
||||
|
||||
HFP_1_6_ENABLE ?= 1
|
||||
|
||||
MSBC_PLC_ENABLE ?= 1
|
||||
|
||||
MSBC_PLC_ENCODER ?= 1
|
||||
|
||||
MSBC_16K_SAMPLE_RATE ?= 1
|
||||
|
||||
SBC_FUNC_IN_ROM ?= 0
|
||||
|
||||
ROM_UTILS_ON ?= 0
|
||||
|
||||
APP_LINEIN_A2DP_SOURCE ?= 0
|
||||
|
||||
APP_I2S_A2DP_SOURCE ?= 0
|
||||
|
||||
VOICE_PROMPT ?= 1
|
||||
|
||||
export THROUGH_PUT ?= 0
|
||||
|
||||
#### Google related feature ####
|
||||
# the overall google service switch
|
||||
# currently, google service includes BISTO and GFPS
|
||||
export GOOGLE_SERVICE_ENABLE ?= 0
|
||||
|
||||
# BISTO is a GVA service on Bluetooth audio device
|
||||
# BISTO is an isolated service relative to GFPS
|
||||
export BISTO_ENABLE ?= 0
|
||||
|
||||
# macro switch for reduced_guesture
|
||||
export REDUCED_GUESTURE_ENABLE ?= 0
|
||||
|
||||
# GSOUND_HOTWORD is a hotword library running on Bluetooth audio device
|
||||
# GSOUND_HOTWORD is a subset of BISTO
|
||||
export GSOUND_HOTWORD_ENABLE ?= 0
|
||||
|
||||
# this is a subset choice for gsound hotword
|
||||
export GSOUND_HOTWORD_EXTERNAL ?= 0
|
||||
|
||||
# GFPS is google fastpair service
|
||||
# GFPS is an isolated service relative to BISTO
|
||||
export GFPS_ENABLE ?= 0
|
||||
#### Google related feature ####
|
||||
|
||||
export WL_UI ?= 1
|
||||
|
||||
BLE ?= 0
|
||||
|
||||
TOTA ?= 0
|
||||
|
||||
GATT_OVER_BR_EDR ?= 0
|
||||
|
||||
OTA_ENABLE ?= 0
|
||||
|
||||
TILE_DATAPATH_ENABLED ?= 0
|
||||
|
||||
CUSTOM_INFORMATION_TILE_ENABLE ?= 0
|
||||
|
||||
INTERCONNECTION ?= 0
|
||||
|
||||
INTERACTION ?= 0
|
||||
|
||||
INTERACTION_FASTPAIR ?= 0
|
||||
|
||||
BT_ONE_BRING_TWO ?= 0
|
||||
|
||||
DSD_SUPPORT ?= 0
|
||||
|
||||
A2DP_EQ_24BIT ?= 1
|
||||
|
||||
A2DP_AAC_ON ?= 1
|
||||
|
||||
A2DP_SCALABLE_ON ?= 0
|
||||
|
||||
A2DP_LHDC_ON ?= 0
|
||||
ifeq ($(A2DP_LHDC_ON),1)
|
||||
A2DP_LHDC_V3 ?= 1
|
||||
A2DP_LHDC_LARC ?= 1
|
||||
export FLASH_UNIQUE_ID ?= 1
|
||||
endif
|
||||
|
||||
A2DP_LDAC_ON ?= 0
|
||||
|
||||
export TX_RX_PCM_MASK ?= 0
|
||||
|
||||
A2DP_SCALABLE_ON ?= 0
|
||||
|
||||
FACTORY_MODE ?= 1
|
||||
|
||||
ENGINEER_MODE ?= 0
|
||||
|
||||
ULTRA_LOW_POWER ?= 1
|
||||
|
||||
DAC_CLASSG_ENABLE ?= 1
|
||||
|
||||
NO_SLEEP ?= 0
|
||||
|
||||
CORE_DUMP ?= 1
|
||||
|
||||
CORE_DUMP_TO_FLASH ?= 0
|
||||
|
||||
ENHANCED_STACK ?= 1
|
||||
|
||||
export SYNC_BT_CTLR_PROFILE ?= 0
|
||||
|
||||
export A2DP_AVDTP_CP ?= 0
|
||||
|
||||
export A2DP_DECODER_VER := 2
|
||||
|
||||
export IBRT ?= 1
|
||||
|
||||
export IBRT_SEARCH_UI ?= 1
|
||||
|
||||
export BES_AUD ?= 1
|
||||
|
||||
export POWER_MODE ?= DIG_DCDC
|
||||
|
||||
export BT_RF_PREFER ?= 2M
|
||||
|
||||
export SPEECH_CODEC ?= 1
|
||||
|
||||
export TWS_PROMPT_SYNC ?= 0
|
||||
export MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED ?= 0
|
||||
export IOS_MFI ?= 0
|
||||
|
||||
export FLASH_SIZE ?= 0x400000
|
||||
export FLASH_SUSPEND ?= 1
|
||||
|
||||
ifeq ($(DSD_SUPPORT),1)
|
||||
export BTUSB_AUDIO_MODE ?= 1
|
||||
export AUDIO_INPUT_MONO ?= 1
|
||||
export USB_ISO ?= 1
|
||||
export USB_AUDIO_DYN_CFG ?= 1
|
||||
export DELAY_STREAM_OPEN ?= 0
|
||||
export KEEP_SAME_LATENCY ?= 1
|
||||
export HW_FIR_DSD_PROCESS ?= 1
|
||||
ifeq ($(HW_FIR_DSD_PROCESS),1)
|
||||
ifeq ($(CHIP),best2300)
|
||||
export HW_FIR_DSD_BUF_MID_ADDR ?= 0x200A0000
|
||||
export DATA_BUF_START ?= 0x20040000
|
||||
endif
|
||||
endif
|
||||
export USB_AUDIO_UAC2 ?= 1
|
||||
export USB_HIGH_SPEED ?= 1
|
||||
KBUILD_CPPFLAGS += \
|
||||
-DHW_FIR_DSD_BUF_MID_ADDR=$(HW_FIR_DSD_BUF_MID_ADDR) \
|
||||
-DDATA_BUF_START=$(DATA_BUF_START)
|
||||
endif
|
||||
|
||||
USE_THIRDPARTY ?= 0
|
||||
export USE_KNOWLES ?= 0
|
||||
|
||||
ifeq ($(CURRENT_TEST),1)
|
||||
export VCODEC_VOLT ?= 1.6V
|
||||
export VANA_VOLT ?= 1.35V
|
||||
else
|
||||
export VCODEC_VOLT ?= 1.8V
|
||||
export VANA_VOLT ?= 1.35V
|
||||
endif
|
||||
|
||||
export LAURENT_ALGORITHM ?= 0
|
||||
|
||||
export TX_IQ_CAL ?= 0
|
||||
|
||||
export BT_XTAL_SYNC ?= 1
|
||||
|
||||
export BTADDR_FOR_DEBUG ?= 1
|
||||
|
||||
export POWERKEY_I2C_SWITCH ?=0
|
||||
|
||||
export WL_DET ?= 0
|
||||
|
||||
export AUDIO_LOOPBACK ?= 0
|
||||
|
||||
AUTO_TEST ?= 0
|
||||
|
||||
BES_AUTOMATE_TEST ?= 0
|
||||
|
||||
export DUMP_NORMAL_LOG ?= 0
|
||||
|
||||
SUPPORT_BATTERY_REPORT ?= 1
|
||||
|
||||
SUPPORT_HF_INDICATORS ?= 0
|
||||
|
||||
SUPPORT_SIRI ?= 1
|
||||
|
||||
BES_AUDIO_DEV_Main_Board_9v0 ?= 0
|
||||
|
||||
APP_USE_LED_INDICATE_IBRT_STATUS ?= 0
|
||||
|
||||
export BT_EXT_LNA_PA ?=0
|
||||
export BT_EXT_LNA ?=0
|
||||
export BT_EXT_PA ?=0
|
||||
|
||||
ifeq ($(A2DP_LHDC_ON),1)
|
||||
AUDIO_BUFFER_SIZE := 140*1024
|
||||
else
|
||||
AUDIO_BUFFER_SIZE := 100*1024
|
||||
endif
|
||||
|
||||
export TRACE_BUF_SIZE := 16*1024
|
||||
export TRACE_BAUD_RATE := 921600
|
||||
|
||||
init-y :=
|
||||
core-y := platform/ services/ apps/ utils/cqueue/ utils/list/ services/multimedia/ utils/intersyshci/
|
||||
|
||||
KBUILD_CPPFLAGS += \
|
||||
-Iplatform/cmsis/inc \
|
||||
-Iservices/audioflinger \
|
||||
-Iplatform/hal \
|
||||
-Iservices/fs/ \
|
||||
-Iservices/fs/sd \
|
||||
-Iservices/fs/fat \
|
||||
-Iservices/fs/fat/ChaN
|
||||
|
||||
KBUILD_CPPFLAGS += \
|
||||
-DAPP_AUDIO_BUFFER_SIZE=$(AUDIO_BUFFER_SIZE) \
|
||||
-DCHARGER_PLUGINOUT_RESET=1 \
|
||||
-D__APP_KEY_FN_STYLE_A__
|
||||
|
||||
ifeq ($(APP_ANC_KEY),1)
|
||||
KBUILD_CPPFLAGS += -D__BT_ANC_KEY__
|
||||
endif
|
||||
|
||||
ifeq ($(BES_AUDIO_DEV_Main_Board_9v0),1)
|
||||
KBUILD_CPPFLAGS += -DBES_AUDIO_DEV_Main_Board_9v0
|
||||
endif
|
||||
|
||||
ifeq ($(TPORTS_KEY_COEXIST),1)
|
||||
KBUILD_CPPFLAGS += -DTPORTS_KEY_COEXIST
|
||||
endif
|
||||
|
||||
#-DIBRT_LINK_LOWLAYER_MONITOR
|
||||
|
||||
#-D_AUTO_SWITCH_POWER_MODE__
|
||||
#-D__APP_KEY_FN_STYLE_A__
|
||||
#-D__APP_KEY_FN_STYLE_B__
|
||||
#-D__EARPHONE_STAY_BOTH_SCAN__
|
||||
#-D__POWERKEY_CTRL_ONOFF_ONLY__
|
||||
#-DAUDIO_LINEIN
|
||||
|
||||
ifeq ($(CURRENT_TEST),1)
|
||||
INTSRAM_RUN ?= 1
|
||||
endif
|
||||
ifeq ($(INTSRAM_RUN),1)
|
||||
LDS_FILE := best1000_intsram.lds
|
||||
else
|
||||
LDS_FILE := best1000.lds
|
||||
endif
|
||||
|
||||
ifeq ($(GATT_OVER_BR_EDR),1)
|
||||
export GATT_OVER_BR_EDR ?= 1
|
||||
KBUILD_CPPFLAGS += -D__GATT_OVER_BR_EDR__
|
||||
endif
|
||||
|
||||
ifeq ($(TOTA),1)
|
||||
ifeq ($(BLE),1)
|
||||
KBUILD_CPPFLAGS += -DBLE_TOTA_ENABLED
|
||||
endif
|
||||
KBUILD_CPPFLAGS += -DSHOW_RSSI
|
||||
KBUILD_CPPFLAGS += -DTEST_OVER_THE_AIR_ENANBLED
|
||||
export TEST_OVER_THE_AIR ?= 1
|
||||
endif
|
||||
|
||||
KBUILD_CPPFLAGS += -DSHOW_RSSI
|
||||
ifneq ($(A2DP_DECODER_VER), )
|
||||
KBUILD_CPPFLAGS += -DA2DP_DECODER_VER=$(A2DP_DECODER_VER)
|
||||
endif
|
||||
|
||||
KBUILD_CPPFLAGS += \
|
||||
# -DHAL_TRACE_RX_ENABLE
|
||||
|
||||
KBUILD_CFLAGS +=
|
||||
|
||||
LIB_LDFLAGS += -lstdc++ -lsupc++
|
||||
|
||||
export BTIF_HID_DEVICE ?= 1
|
||||
ifeq ($(BTIF_HID_DEVICE),1)
|
||||
KBUILD_CPPFLAGS += -DBTIF_HID_DEVICE
|
||||
endif
|
||||
|
||||
#CFLAGS_IMAGE += -u _printf_float -u _scanf_float
|
||||
|
||||
#LDFLAGS_IMAGE += --wrap main
|
||||
|
|
@ -0,0 +1,327 @@
|
|||
/***************************************************************************
|
||||
*
|
||||
* Copyright 2015-2019 BES.
|
||||
* All rights reserved. All unpublished rights reserved.
|
||||
*
|
||||
* No part of this work may be used or reproduced in any form or by any
|
||||
* means, or stored in a database or retrieval system, without prior written
|
||||
* permission of BES.
|
||||
*
|
||||
* Use of this work is governed by a license granted by BES.
|
||||
* This work contains confidential and proprietary information of
|
||||
* BES. which is protected by copyright, trade secret,
|
||||
* trademark and other intellectual property rights.
|
||||
*
|
||||
****************************************************************************/
|
||||
#include "tgt_hardware.h"
|
||||
#include "iir_process.h"
|
||||
#include "fir_process.h"
|
||||
#include "drc.h"
|
||||
#include "limiter.h"
|
||||
#include "spectrum_fix.h"
|
||||
|
||||
const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM] = {
|
||||
#if (CFG_HW_PLW_NUM > 0)
|
||||
{HAL_IOMUX_PIN_LED2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE},
|
||||
{HAL_IOMUX_PIN_LED1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE},
|
||||
#endif
|
||||
};
|
||||
|
||||
#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__
|
||||
const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_ibrt_indication_pinmux_pwl[3] = {
|
||||
{HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE},
|
||||
{HAL_IOMUX_PIN_LED1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VBAT, HAL_IOMUX_PIN_PULLUP_ENABLE},
|
||||
{HAL_IOMUX_PIN_LED2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VBAT, HAL_IOMUX_PIN_PULLUP_ENABLE},
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef __KNOWLES
|
||||
const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_pinmux_uart[2] = {
|
||||
{HAL_IOMUX_PIN_P2_2, HAL_IOMUX_FUNC_UART2_RX, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_NOPULL},
|
||||
{HAL_IOMUX_PIN_P2_3, HAL_IOMUX_FUNC_UART2_TX, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_NOPULL},
|
||||
};
|
||||
#endif
|
||||
|
||||
//adckey define
|
||||
const uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER] = {
|
||||
#if (CFG_HW_ADCKEY_NUMBER > 0)
|
||||
HAL_KEY_CODE_FN9,HAL_KEY_CODE_FN8,HAL_KEY_CODE_FN7,
|
||||
HAL_KEY_CODE_FN6,HAL_KEY_CODE_FN5,HAL_KEY_CODE_FN4,
|
||||
HAL_KEY_CODE_FN3,HAL_KEY_CODE_FN2,HAL_KEY_CODE_FN1,
|
||||
#endif
|
||||
};
|
||||
|
||||
//gpiokey define
|
||||
#define CFG_HW_GPIOKEY_DOWN_LEVEL (0)
|
||||
#define CFG_HW_GPIOKEY_UP_LEVEL (1)
|
||||
const struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM] = {
|
||||
/*
|
||||
#if (CFG_HW_GPIOKEY_NUM > 0)
|
||||
#ifdef BES_AUDIO_DEV_Main_Board_9v0
|
||||
{HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P0_3, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
{HAL_KEY_CODE_FN2,{HAL_IOMUX_PIN_P0_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
{HAL_KEY_CODE_FN3,{HAL_IOMUX_PIN_P0_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
{HAL_KEY_CODE_FN4,{HAL_IOMUX_PIN_P0_2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
//{HAL_KEY_CODE_FN5,{HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
// {HAL_KEY_CODE_FN6,{HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
#else
|
||||
#ifndef TPORTS_KEY_COEXIST
|
||||
{HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
{HAL_KEY_CODE_FN2,{HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
// {HAL_KEY_CODE_FN3,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
{HAL_KEY_CODE_FN15,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
#else
|
||||
{HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
{HAL_KEY_CODE_FN15,{HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
#endif
|
||||
#endif
|
||||
#ifdef IS_MULTI_AI_ENABLED
|
||||
//{HAL_KEY_CODE_FN13,{HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
//{HAL_KEY_CODE_FN14,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
#endif
|
||||
#endif
|
||||
*/
|
||||
{HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},
|
||||
};
|
||||
|
||||
//bt config
|
||||
//const char *BT_LOCAL_NAME = TO_STRING(BT_DEV_NAME) "\0";
|
||||
const char *BT_LOCAL_NAME = "PineBuds Pro";
|
||||
const char *BLE_DEFAULT_NAME = "BES_BLE";
|
||||
uint8_t ble_addr[6] = {
|
||||
#ifdef BLE_DEV_ADDR
|
||||
BLE_DEV_ADDR
|
||||
#else
|
||||
0xBE,0x99,0x34,0x45,0x56,0x67
|
||||
#endif
|
||||
};
|
||||
uint8_t bt_addr[6] = {
|
||||
#ifdef BT_DEV_ADDR
|
||||
BT_DEV_ADDR
|
||||
#else
|
||||
0x1e,0x57,0x34,0x45,0x56,0x67
|
||||
#endif
|
||||
};
|
||||
|
||||
//audio config
|
||||
//freq bands range {[0k:2.5K], [2.5k:5K], [5k:7.5K], [7.5K:10K], [10K:12.5K], [12.5K:15K], [15K:17.5K], [17.5K:20K]}
|
||||
//gain range -12~+12
|
||||
const int8_t cfg_aud_eq_sbc_band_settings[CFG_HW_AUD_EQ_NUM_BANDS] = {0, 0, 0, 0, 0, 0, 0, 0};
|
||||
|
||||
#define TX_PA_GAIN CODEC_TX_PA_GAIN_DEFAULT
|
||||
|
||||
const struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY] = {
|
||||
{TX_PA_GAIN,0x03,-21},
|
||||
{TX_PA_GAIN,0x03,-99},
|
||||
{TX_PA_GAIN,0x03,-45},
|
||||
{TX_PA_GAIN,0x03,-42},
|
||||
{TX_PA_GAIN,0x03,-39},
|
||||
{TX_PA_GAIN,0x03,-36},
|
||||
{TX_PA_GAIN,0x03,-33},
|
||||
{TX_PA_GAIN,0x03,-30},
|
||||
{TX_PA_GAIN,0x03,-27},
|
||||
{TX_PA_GAIN,0x03,-24},
|
||||
{TX_PA_GAIN,0x03,-21},
|
||||
{TX_PA_GAIN,0x03,-18},
|
||||
{TX_PA_GAIN,0x03,-15},
|
||||
{TX_PA_GAIN,0x03,-12},
|
||||
{TX_PA_GAIN,0x03, -9},
|
||||
{TX_PA_GAIN,0x03, -6},
|
||||
{TX_PA_GAIN,0x03, -3},
|
||||
{TX_PA_GAIN,0x03, 0}, //0dBm
|
||||
};
|
||||
|
||||
#if SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 2
|
||||
#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC2|AUD_VMIC_MAP_VMIC3)
|
||||
#elif SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 3
|
||||
#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1 | AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC1)
|
||||
#else
|
||||
#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC3)
|
||||
#endif
|
||||
|
||||
#define CFG_HW_AUD_INPUT_PATH_LINEIN_DEV (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)
|
||||
#ifdef VOICE_DETECTOR_EN
|
||||
#define CFG_HW_AUD_INPUT_PATH_VADMIC_DEV (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC1)
|
||||
#else
|
||||
#define CFG_HW_AUD_INPUT_PATH_ASRMIC_DEV (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC3)
|
||||
#endif
|
||||
|
||||
const struct AUD_IO_PATH_CFG_T cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM] = {
|
||||
#if defined(SPEECH_TX_AEC_CODEC_REF)
|
||||
// NOTE: If enable Ch5 and CH6, need to add channel_num when setup audioflinger stream
|
||||
{ AUD_INPUT_PATH_MAINMIC, CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV | AUD_CHANNEL_MAP_CH4, },
|
||||
#else
|
||||
{ AUD_INPUT_PATH_MAINMIC, CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV, },
|
||||
#endif
|
||||
{ AUD_INPUT_PATH_LINEIN, CFG_HW_AUD_INPUT_PATH_LINEIN_DEV, },
|
||||
#ifdef VOICE_DETECTOR_EN
|
||||
{ AUD_INPUT_PATH_VADMIC, CFG_HW_AUD_INPUT_PATH_VADMIC_DEV, },
|
||||
#else
|
||||
{ AUD_INPUT_PATH_ASRMIC, CFG_HW_AUD_INPUT_PATH_ASRMIC_DEV, },
|
||||
#endif
|
||||
};
|
||||
|
||||
const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg = {
|
||||
HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE
|
||||
};
|
||||
|
||||
const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg = {
|
||||
HAL_IOMUX_PIN_P1_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE
|
||||
};
|
||||
|
||||
const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg = {
|
||||
HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_INT ={
|
||||
HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE
|
||||
};
|
||||
*/
|
||||
|
||||
const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SDA ={
|
||||
HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE
|
||||
};
|
||||
|
||||
const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SCL ={
|
||||
HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE
|
||||
};
|
||||
|
||||
|
||||
const IIR_CFG_T audio_eq_sw_iir_cfg = {
|
||||
.gain0 = 0,
|
||||
.gain1 = 0,
|
||||
.num = 5,
|
||||
.param = {
|
||||
{IIR_TYPE_PEAK, .0, 200, 2},
|
||||
{IIR_TYPE_PEAK, .0, 600, 2},
|
||||
{IIR_TYPE_PEAK, .0, 2000.0, 2},
|
||||
{IIR_TYPE_PEAK, .0, 6000.0, 2},
|
||||
{IIR_TYPE_PEAK, .0, 12000.0, 2}
|
||||
}
|
||||
};
|
||||
|
||||
const IIR_CFG_T * const audio_eq_sw_iir_cfg_list[EQ_SW_IIR_LIST_NUM]={
|
||||
&audio_eq_sw_iir_cfg,
|
||||
};
|
||||
|
||||
const FIR_CFG_T audio_eq_hw_fir_cfg_44p1k = {
|
||||
.gain = 0.0f,
|
||||
.len = 384,
|
||||
.coef =
|
||||
{
|
||||
(1<<23)-1,
|
||||
}
|
||||
};
|
||||
|
||||
const FIR_CFG_T audio_eq_hw_fir_cfg_48k = {
|
||||
.gain = 0.0f,
|
||||
.len = 384,
|
||||
.coef =
|
||||
{
|
||||
(1<<23)-1,
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
const FIR_CFG_T audio_eq_hw_fir_cfg_96k = {
|
||||
.gain = 0.0f,
|
||||
.len = 384,
|
||||
.coef =
|
||||
{
|
||||
(1<<23)-1,
|
||||
}
|
||||
};
|
||||
|
||||
const FIR_CFG_T * const audio_eq_hw_fir_cfg_list[EQ_HW_FIR_LIST_NUM]={
|
||||
&audio_eq_hw_fir_cfg_44p1k,
|
||||
&audio_eq_hw_fir_cfg_48k,
|
||||
&audio_eq_hw_fir_cfg_96k,
|
||||
};
|
||||
|
||||
//hardware dac iir eq
|
||||
const IIR_CFG_T audio_eq_hw_dac_iir_cfg = {
|
||||
.gain0 = 0,
|
||||
.gain1 = 0,
|
||||
.num = 8,
|
||||
.param = {
|
||||
{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
|
||||
{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
|
||||
{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
|
||||
{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
|
||||
{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
|
||||
{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
|
||||
{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
|
||||
{IIR_TYPE_PEAK, 0, 1000.0, 0.7},
|
||||
}
|
||||
};
|
||||
|
||||
const IIR_CFG_T * const POSSIBLY_UNUSED audio_eq_hw_dac_iir_cfg_list[EQ_HW_DAC_IIR_LIST_NUM]={
|
||||
&audio_eq_hw_dac_iir_cfg,
|
||||
};
|
||||
|
||||
//hardware dac iir eq
|
||||
const IIR_CFG_T audio_eq_hw_adc_iir_adc_cfg = {
|
||||
.gain0 = 0,
|
||||
.gain1 = 0,
|
||||
.num = 1,
|
||||
.param = {
|
||||
{IIR_TYPE_PEAK, 0.0, 1000.0, 0.7},
|
||||
}
|
||||
};
|
||||
|
||||
const IIR_CFG_T * const POSSIBLY_UNUSED audio_eq_hw_adc_iir_cfg_list[EQ_HW_ADC_IIR_LIST_NUM]={
|
||||
&audio_eq_hw_adc_iir_adc_cfg,
|
||||
};
|
||||
|
||||
|
||||
|
||||
//hardware iir eq
|
||||
const IIR_CFG_T audio_eq_hw_iir_cfg = {
|
||||
.gain0 = 0,
|
||||
.gain1 = 0,
|
||||
.num = 8,
|
||||
.param = {
|
||||
{IIR_TYPE_PEAK, -10.1, 100.0, 7},
|
||||
{IIR_TYPE_PEAK, -10.1, 400.0, 7},
|
||||
{IIR_TYPE_PEAK, -10.1, 700.0, 7},
|
||||
{IIR_TYPE_PEAK, -10.1, 1000.0, 7},
|
||||
{IIR_TYPE_PEAK, -10.1, 3000.0, 7},
|
||||
{IIR_TYPE_PEAK, -10.1, 5000.0, 7},
|
||||
{IIR_TYPE_PEAK, -10.1, 7000.0, 7},
|
||||
{IIR_TYPE_PEAK, -10.1, 9000.0, 7},
|
||||
|
||||
}
|
||||
};
|
||||
|
||||
const IIR_CFG_T * const POSSIBLY_UNUSED audio_eq_hw_iir_cfg_list[EQ_HW_IIR_LIST_NUM]={
|
||||
&audio_eq_hw_iir_cfg,
|
||||
};
|
||||
|
||||
const DrcConfig audio_drc_cfg = {
|
||||
.knee = 3,
|
||||
.filter_type = {14, -1},
|
||||
.band_num = 2,
|
||||
.look_ahead_time = 10,
|
||||
.band_settings = {
|
||||
{-20, 0, 2, 3, 3000, 1},
|
||||
{-20, 0, 2, 3, 3000, 1},
|
||||
}
|
||||
};
|
||||
|
||||
const LimiterConfig audio_drc2_cfg = {
|
||||
.knee = 2,
|
||||
.look_ahead_time = 10,
|
||||
.threshold = -20,
|
||||
.makeup_gain = 19,
|
||||
.ratio = 1000,
|
||||
.attack_time = 3,
|
||||
.release_time = 3000,
|
||||
};
|
||||
|
||||
const SpectrumFixConfig audio_spectrum_cfg = {
|
||||
.freq_num = 9,
|
||||
.freq_list = {200, 400, 600, 800, 1000, 1200, 1400, 1600, 1800},
|
||||
};
|
||||
|
||||
|
|
@ -0,0 +1,148 @@
|
|||
/***************************************************************************
|
||||
*
|
||||
* Copyright 2015-2019 BES.
|
||||
* All rights reserved. All unpublished rights reserved.
|
||||
*
|
||||
* No part of this work may be used or reproduced in any form or by any
|
||||
* means, or stored in a database or retrieval system, without prior written
|
||||
* permission of BES.
|
||||
*
|
||||
* Use of this work is governed by a license granted by BES.
|
||||
* This work contains confidential and proprietary information of
|
||||
* BES. which is protected by copyright, trade secret,
|
||||
* trademark and other intellectual property rights.
|
||||
*
|
||||
****************************************************************************/
|
||||
#ifndef __TGT_HARDWARE__
|
||||
#define __TGT_HARDWARE__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "hal_iomux.h"
|
||||
#include "hal_gpio.h"
|
||||
#include "hal_key.h"
|
||||
#include "hal_aud.h"
|
||||
|
||||
//config hwardware codec iir.
|
||||
#define EQ_HW_DAC_IIR_LIST_NUM 1
|
||||
#define EQ_HW_ADC_IIR_LIST_NUM 1
|
||||
#define EQ_HW_IIR_LIST_NUM 1
|
||||
#define EQ_SW_IIR_LIST_NUM 1
|
||||
#define EQ_HW_FIR_LIST_NUM 3
|
||||
|
||||
//pwl
|
||||
|
||||
#ifdef __BT_DEBUG_TPORTS__
|
||||
#define CFG_HW_PLW_NUM (0)
|
||||
#else
|
||||
#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__
|
||||
#define CFG_HW_PLW_NUM (0)
|
||||
#else
|
||||
#define CFG_HW_PLW_NUM (2)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
extern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM];
|
||||
#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__
|
||||
extern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_ibrt_indication_pinmux_pwl[3];
|
||||
#endif
|
||||
|
||||
#ifdef __KNOWLES
|
||||
extern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_pinmux_uart[2];
|
||||
#endif
|
||||
|
||||
//adckey define
|
||||
#define CFG_HW_ADCKEY_NUMBER 0
|
||||
#define CFG_HW_ADCKEY_BASE 0
|
||||
#define CFG_HW_ADCKEY_ADC_MAXVOLT 1000
|
||||
#define CFG_HW_ADCKEY_ADC_MINVOLT 0
|
||||
#define CFG_HW_ADCKEY_ADC_KEYVOLT_BASE 130
|
||||
extern const uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER];
|
||||
|
||||
#define BTA_AV_CO_SBC_MAX_BITPOOL 52
|
||||
|
||||
#ifdef __BT_DEBUG_TPORTS__
|
||||
#ifdef TPORTS_KEY_COEXIST
|
||||
#define CFG_HW_GPIOKEY_NUM (2)
|
||||
#else
|
||||
#define CFG_HW_GPIOKEY_NUM (0)
|
||||
#endif
|
||||
#else
|
||||
//gpiokey define
|
||||
#ifdef IS_MULTI_AI_ENABLED
|
||||
#define CFG_HW_GPIOKEY_NUM (3)
|
||||
#elif BES_AUDIO_DEV_Main_Board_9v0
|
||||
#define CFG_HW_GPIOKEY_NUM (6)
|
||||
#else
|
||||
#define CFG_HW_GPIOKEY_NUM (1)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
extern const struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM];
|
||||
|
||||
// ANC function key
|
||||
#define ANC_FUNCTION_KEY HAL_KEY_CODE_PWR
|
||||
|
||||
// ANC coefficient curve number
|
||||
#define ANC_COEF_NUM (1)
|
||||
|
||||
//#define ANC_TALK_THROUGH
|
||||
|
||||
#ifdef ANC_TALK_THROUGH
|
||||
#define ANC_COEF_LIST_NUM (ANC_COEF_NUM + 1)
|
||||
#else
|
||||
#define ANC_COEF_LIST_NUM (ANC_COEF_NUM)
|
||||
#endif
|
||||
|
||||
#define ANC_FF_MIC_CH_L AUD_CHANNEL_MAP_CH0
|
||||
#define ANC_FF_MIC_CH_R AUD_CHANNEL_MAP_CH1
|
||||
#define ANC_FB_MIC_CH_L AUD_CHANNEL_MAP_CH2
|
||||
#define ANC_FB_MIC_CH_R AUD_CHANNEL_MAP_CH3
|
||||
|
||||
// audio codec
|
||||
#define CFG_HW_AUD_INPUT_PATH_NUM 3
|
||||
extern const struct AUD_IO_PATH_CFG_T cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM];
|
||||
|
||||
#define CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV (AUD_CHANNEL_MAP_CH0)
|
||||
|
||||
#define CFG_HW_AUD_SIDETONE_MIC_DEV (AUD_CHANNEL_MAP_CH0)
|
||||
#define CFG_HW_AUD_SIDETONE_GAIN_DBVAL (-20)
|
||||
|
||||
//bt config
|
||||
extern const char *BT_LOCAL_NAME;
|
||||
extern const char *BLE_DEFAULT_NAME;
|
||||
extern uint8_t ble_addr[6];
|
||||
extern uint8_t bt_addr[6];
|
||||
|
||||
#define CODEC_SADC_VOL (12)
|
||||
|
||||
extern const struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY];
|
||||
|
||||
//range -12~+12
|
||||
#define CFG_HW_AUD_EQ_NUM_BANDS (8)
|
||||
extern const int8_t cfg_aud_eq_sbc_band_settings[CFG_HW_AUD_EQ_NUM_BANDS];
|
||||
#define CFG_AUD_EQ_IIR_NUM_BANDS (4)
|
||||
|
||||
//battery info
|
||||
#define APP_BATTERY_MIN_MV (3200)
|
||||
#define APP_BATTERY_PD_MV (3100)
|
||||
|
||||
#define APP_BATTERY_MAX_MV (4200)
|
||||
|
||||
extern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg;
|
||||
extern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg;
|
||||
extern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg;
|
||||
|
||||
//extern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_INT;
|
||||
|
||||
extern bool tgt_tws_get_channel_is_right(void);
|
||||
|
||||
extern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SDA;
|
||||
extern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SCL;
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -69,7 +69,7 @@ export AUDIO_ANC_FB_MC ?= 0
|
|||
export AUDIO_SECTION_SUPPT ?= 0
|
||||
export AUD_SECTION_STRUCT_VERSION ?= 2
|
||||
export AUDIO_ANC_FB_MC_HW ?=0
|
||||
export APP_ANC_KEY ?= 0
|
||||
export APP_ANC_KEY ?= 1
|
||||
export ANC_FB_CHECK ?= 1
|
||||
##### ANC DEFINE END ######
|
||||
|
||||
|
|
@ -366,9 +366,13 @@ KBUILD_CPPFLAGS += \
|
|||
|
||||
KBUILD_CPPFLAGS += \
|
||||
-DAPP_AUDIO_BUFFER_SIZE=$(AUDIO_BUFFER_SIZE) \
|
||||
-DCHARGER_PLUGINOUT_RESET=1
|
||||
# -D__A2DP_AVDTP_CP__ \
|
||||
|
||||
-DCHARGER_PLUGINOUT_RESET=1 \
|
||||
|
||||
|
||||
ifeq ($(APP_ANC_KEY),1)
|
||||
KBUILD_CPPFLAGS += -D__BT_ANC_KEY__
|
||||
endif
|
||||
|
||||
ifeq ($(BES_AUDIO_DEV_Main_Board_9v0),1)
|
||||
KBUILD_CPPFLAGS += -DBES_AUDIO_DEV_Main_Board_9v0
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@
|
|||
*
|
||||
****************************************************************************/
|
||||
#include "tgt_hardware.h"
|
||||
#include "aud_section.h"
|
||||
#include "iir_process.h"
|
||||
#include "fir_process.h"
|
||||
#include "drc.h"
|
||||
|
|
@ -189,6 +190,788 @@ const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SCL ={
|
|||
};
|
||||
|
||||
|
||||
|
||||
#define IIR_COUNTER_FF_L (6)
|
||||
#define IIR_COUNTER_FF_R (6)
|
||||
#define IIR_COUNTER_FB_L (5)
|
||||
#define IIR_COUNTER_FB_R (5)
|
||||
|
||||
|
||||
static const struct_anc_cfg POSSIBLY_UNUSED AncFirCoef_50p7k_mode0 = {
|
||||
.anc_cfg_ff_l = {
|
||||
// .total_gain = 440,
|
||||
.total_gain = 350,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=IIR_COUNTER_FF_L,
|
||||
|
||||
.iir_coef[0].coef_b={42462788, -84862242, 42399478},
|
||||
.iir_coef[0].coef_a={134217728, -268358003, 134140286},
|
||||
|
||||
.iir_coef[1].coef_b={135905569, -267224817, 131334465},
|
||||
.iir_coef[1].coef_a={134217728, -267224817, 133022306},
|
||||
|
||||
.iir_coef[2].coef_b={132936489, -263935268, 131067941},
|
||||
.iir_coef[2].coef_a={134217728, -263935268, 129786702},
|
||||
|
||||
.iir_coef[3].coef_b={131758190, -257297054, 126191415},
|
||||
.iir_coef[3].coef_a={134217728, -257297054, 123731878},
|
||||
|
||||
.iir_coef[4].coef_b={0x8000000,0,0},
|
||||
.iir_coef[4].coef_a={0x8000000,0,0},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
.anc_cfg_ff_r = {
|
||||
// .total_gain = 382,
|
||||
.total_gain = 350,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=IIR_COUNTER_FF_R,
|
||||
|
||||
.iir_coef[0].coef_b={42462788, -84862242, 42399478},
|
||||
.iir_coef[0].coef_a={134217728, -268358003, 134140286},
|
||||
|
||||
.iir_coef[1].coef_b={135905569, -267224817, 131334465},
|
||||
.iir_coef[1].coef_a={134217728, -267224817, 133022306},
|
||||
|
||||
.iir_coef[2].coef_b={132936489, -263935268, 131067941},
|
||||
.iir_coef[2].coef_a={134217728, -263935268, 129786702},
|
||||
|
||||
.iir_coef[3].coef_b={131758190, -257297054, 126191415},
|
||||
.iir_coef[3].coef_a={134217728, -257297054, 123731878},
|
||||
|
||||
.iir_coef[4].coef_b={0x8000000,0,0},
|
||||
.iir_coef[4].coef_a={0x8000000,0,0},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
|
||||
|
||||
/*
|
||||
|
||||
Filter1_B=[ 27461831, -54408898, 27001841];
|
||||
Filter1_A=[ 134217728, -216605724, 82606056];
|
||||
|
||||
Filter2_B=[ 138294078, -267600712, 129323227];
|
||||
Filter2_A=[ 134217728, -267600712, 133399577];
|
||||
|
||||
Filter3_B=[ 134500015, -268177932, 133678688];
|
||||
Filter3_A=[ 134217728, -268177932, 133960975];
|
||||
|
||||
Filter4_B=[ 133629164, -264794659, 131257050];
|
||||
Filter4_A=[ 134217728, -264794659, 130668486];
|
||||
|
||||
|
||||
*/
|
||||
|
||||
.anc_cfg_fb_l = {
|
||||
.total_gain = 350,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=IIR_COUNTER_FB_L,
|
||||
|
||||
.iir_coef[0].coef_b={ 27461831, -54408898, 27001841},
|
||||
.iir_coef[0].coef_a={134217728, -216605724, 82606056},
|
||||
|
||||
.iir_coef[1].coef_b={138294078, -267600712, 129323227},
|
||||
.iir_coef[1].coef_a={134217728, -267600712, 133399577},
|
||||
|
||||
.iir_coef[2].coef_b={134500015, -268177932, 133678688},
|
||||
.iir_coef[2].coef_a={134217728, -268177932, 133960975},
|
||||
|
||||
.iir_coef[3].coef_b={133629164, -264794659, 131257050},
|
||||
.iir_coef[3].coef_a={134217728, -264794659, 130668486},
|
||||
|
||||
.iir_coef[4].coef_b={0x8000000,0,0},
|
||||
.iir_coef[4].coef_a={0x8000000,0,0},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
.anc_cfg_fb_r = {
|
||||
.total_gain = 350,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=IIR_COUNTER_FB_R,
|
||||
|
||||
.iir_coef[0].coef_b={ 27461831, -54408898, 27001841},
|
||||
.iir_coef[0].coef_a={134217728, -216605724, 82606056},
|
||||
|
||||
.iir_coef[1].coef_b={138294078, -267600712, 129323227},
|
||||
.iir_coef[1].coef_a={134217728, -267600712, 133399577},
|
||||
|
||||
.iir_coef[2].coef_b={134500015, -268177932, 133678688},
|
||||
.iir_coef[2].coef_a={134217728, -268177932, 133960975},
|
||||
|
||||
.iir_coef[3].coef_b={133629164, -264794659, 131257050},
|
||||
.iir_coef[3].coef_a={134217728, -264794659, 130668486},
|
||||
|
||||
.iir_coef[4].coef_b={0x8000000,0,0},
|
||||
.iir_coef[4].coef_a={0x8000000,0,0},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
|
||||
|
||||
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
|
||||
//ff
|
||||
|
||||
|
||||
Filter1_B=[ 42463913, -84860822, 42396935];
|
||||
Filter1_A=[ 134217728, -268353516, 134135801];
|
||||
|
||||
Filter2_B=[ 136002894, -267154076, 131168209];
|
||||
Filter2_A=[ 134217728, -267154076, 132953376];
|
||||
|
||||
Filter3_B=[ 132863566, -263674901, 130888668];
|
||||
Filter3_A=[ 134217728, -263674901, 129534506];
|
||||
|
||||
Filter4_B=[ 131621817, -256639526, 125746382];
|
||||
Filter4_A=[ 134217728, -256639526, 123150471];
|
||||
|
||||
|
||||
|
||||
*/
|
||||
|
||||
static const struct_anc_cfg POSSIBLY_UNUSED AncFirCoef_48k_mode0 = {
|
||||
.anc_cfg_ff_l = {
|
||||
// .total_gain = 440,
|
||||
.total_gain = 312,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=IIR_COUNTER_FF_L,
|
||||
|
||||
.iir_coef[0].coef_b={42463913, -84860822, 42396935},
|
||||
.iir_coef[0].coef_a={134217728, -268353516, 134135801},
|
||||
|
||||
.iir_coef[1].coef_b={136002894, -267154076, 131168209},
|
||||
.iir_coef[1].coef_a={134217728, -267154076, 132953376},
|
||||
|
||||
.iir_coef[2].coef_b={132863566, -263674901, 130888668},
|
||||
.iir_coef[2].coef_a={134217728, -263674901, 129534506},
|
||||
|
||||
.iir_coef[3].coef_b={131621817, -256639526, 125746382},
|
||||
.iir_coef[3].coef_a={134217728, -256639526, 123150471},
|
||||
|
||||
.iir_coef[4].coef_b={0x8000000,0,0},
|
||||
.iir_coef[4].coef_a={0x8000000,0,0},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
.anc_cfg_ff_r = {
|
||||
// .total_gain = 382,
|
||||
.total_gain = 288,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=IIR_COUNTER_FF_R,
|
||||
|
||||
.iir_coef[0].coef_b={42463913, -84860822, 42396935},
|
||||
.iir_coef[0].coef_a={134217728, -268353516, 134135801},
|
||||
|
||||
.iir_coef[1].coef_b={136002894, -267154076, 131168209},
|
||||
.iir_coef[1].coef_a={134217728, -267154076, 132953376},
|
||||
|
||||
.iir_coef[2].coef_b={132863566, -263674901, 130888668},
|
||||
.iir_coef[2].coef_a={134217728, -263674901, 129534506},
|
||||
|
||||
.iir_coef[3].coef_b={131621817, -256639526, 125746382},
|
||||
.iir_coef[3].coef_a={134217728, -256639526, 123150471},
|
||||
|
||||
.iir_coef[4].coef_b={0x8000000,0,0},
|
||||
.iir_coef[4].coef_a={0x8000000,0,0},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
|
||||
|
||||
/*
|
||||
|
||||
Filter1_B=[ 27172676, -53803459, 26691412];
|
||||
Filter1_A=[ 134217728, -214195429, 80219070];
|
||||
|
||||
Filter2_B=[ 138529480, -267551490, 129040578];
|
||||
Filter2_A=[ 134217728, -267551490, 133352330];
|
||||
|
||||
Filter3_B=[ 134516353, -268162980, 133647489];
|
||||
Filter3_A=[ 134217728, -268162980, 133946114];
|
||||
|
||||
Filter4_B=[ 133595549, -264581113, 131087955];
|
||||
Filter4_A=[ 134217728, -264581113, 130465777];
|
||||
|
||||
|
||||
*/
|
||||
|
||||
.anc_cfg_fb_l = {
|
||||
.total_gain = 511,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=IIR_COUNTER_FB_L,
|
||||
|
||||
.iir_coef[0].coef_b={ 27172676, -53803459, 26691412},
|
||||
.iir_coef[0].coef_a={134217728, -214195429, 80219070},
|
||||
|
||||
.iir_coef[1].coef_b={138529480, -267551490, 129040578},
|
||||
.iir_coef[1].coef_a={134217728, -267551490, 133352330},
|
||||
|
||||
.iir_coef[2].coef_b={134516353, -268162980, 133647489},
|
||||
.iir_coef[2].coef_a={134217728, -268162980, 133946114},
|
||||
|
||||
.iir_coef[3].coef_b={133595549, -264581113, 131087955},
|
||||
.iir_coef[3].coef_a={134217728, -264581113, 130465777},
|
||||
|
||||
.iir_coef[4].coef_b={0x8000000,0,0},
|
||||
.iir_coef[4].coef_a={0x8000000,0,0},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
.anc_cfg_fb_r = {
|
||||
.total_gain = 511,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=IIR_COUNTER_FB_R,
|
||||
|
||||
.iir_coef[0].coef_b={ 27172676, -53803459, 26691412},
|
||||
.iir_coef[0].coef_a={134217728, -214195429, 80219070},
|
||||
|
||||
.iir_coef[1].coef_b={138529480, -267551490, 129040578},
|
||||
.iir_coef[1].coef_a={134217728, -267551490, 133352330},
|
||||
|
||||
.iir_coef[2].coef_b={134516353, -268162980, 133647489},
|
||||
.iir_coef[2].coef_a={134217728, -268162980, 133946114},
|
||||
|
||||
.iir_coef[3].coef_b={133595549, -264581113, 131087955},
|
||||
.iir_coef[3].coef_a={134217728, -264581113, 130465777},
|
||||
|
||||
.iir_coef[4].coef_b={0x8000000,0,0},
|
||||
.iir_coef[4].coef_a={0x8000000,0,0},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
|
||||
#if (AUD_SECTION_STRUCT_VERSION == 2)
|
||||
|
||||
|
||||
/*
|
||||
1.0000000000000000,-1.5858874672928407,0.6974239598044429,0.2832267077115959,-0.3117526885614825,0.1400624733614886,
|
||||
Filter1_B=[ 4751756, -5230342, 2349858];
|
||||
Filter1_A=[ 16777216, -26606777, 11700832];
|
||||
|
||||
|
||||
1.0000000000000000,-1.7971697583202608,0.8159624512785459,0.9540998606028980,-1.7971697583202608,0.8618625906756480,
|
||||
Filter2_B=[ 16007139, -30151505, 14459655];
|
||||
Filter2_A=[ 16777216, -30151505, 13689578];
|
||||
|
||||
|
||||
1.0000000000000000,-1.9694050640918992,0.9705681145972464,0.3200483744622364,-0.6223829329788905,0.3034976090220014,
|
||||
Filter3_B=[ 5369521, -10441853, 5091845];
|
||||
Filter3_A=[ 16777216, -33041134, 16283431];
|
||||
|
||||
|
||||
1.0000000000000000,-1.9921619776276678,0.9921812243512138,0.9968660174712476,-1.9921712178765081,0.9953059666311256,
|
||||
Filter4_B=[ 16724636, -33423087, 16698463];
|
||||
Filter4_A=[ 16777216, -33422932, 16646039];
|
||||
*/
|
||||
|
||||
/*
|
||||
|
||||
1.0000000000000000,-1.9868580074509832,0.9869011854430232,1.1834688902733632,-2.3614075958038656,1.1779451659756268,
|
||||
Filter1_B=[ 19855313, -39617845, 19762640];
|
||||
Filter1_A=[ 16777216, -33333946, 16557454];
|
||||
|
||||
|
||||
1.0000000000000000,-1.0329261527674278,0.0418392318218667,0.5812322628931170,-1.0329261527674278,0.4606069689287498,
|
||||
Filter2_B=[ 9751459, -17329625, 7727703];
|
||||
Filter2_A=[ 16777216, -17329625, 701946];
|
||||
|
||||
|
||||
1.0000000000000000,-1.9576081396140492,0.9591185490154677,1.0729914166044796,-1.9576081396140492,0.8861271324109881,
|
||||
Filter3_B=[ 18001809, -32843215, 14866746];
|
||||
Filter3_A=[ 16777216, -32843215, 16091339];
|
||||
|
||||
|
||||
1.0000000000000000,-1.9197071583239940,0.9219883336398085,0.7545642546264146,-1.4392920140632206,0.6870089347526202,
|
||||
Filter4_B=[ 12659487, -24147313, 11526097];
|
||||
Filter4_A=[ 16777216, -32207342, 15468397];
|
||||
|
||||
|
||||
1.0000000000000000,-1.9102108535747602,0.9139876710346515,0.9829076121866517,-1.9102108535747602,0.9310800588479999,
|
||||
Filter5_B=[ 16490453, -32048020, 15620931];
|
||||
Filter5_A=[ 16777216, -32048020, 15334169];
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
.anc_cfg_mc_l = {
|
||||
.total_gain = 1228,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=5,
|
||||
|
||||
.iir_coef[0].coef_b={19855313, -39617845, 19762640},
|
||||
.iir_coef[0].coef_a={16777216, -33333946, 16557454},
|
||||
|
||||
.iir_coef[1].coef_b={9751459, -17329625, 7727703},
|
||||
.iir_coef[1].coef_a={16777216, -17329625, 701946},
|
||||
|
||||
.iir_coef[2].coef_b={18001809, -32843215, 14866746},
|
||||
.iir_coef[2].coef_a={16777216, -32843215, 16091339},
|
||||
|
||||
.iir_coef[3].coef_b={12659487, -24147313, 11526097},
|
||||
.iir_coef[3].coef_a={16777216, -32207342, 15468397},
|
||||
|
||||
.iir_coef[4].coef_b={16490453, -32048020, 15620931},
|
||||
.iir_coef[4].coef_a={16777216, -32048020, 15334169},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
.anc_cfg_mc_r = {
|
||||
.total_gain = 1331,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=5,
|
||||
|
||||
.iir_coef[0].coef_b={19855313, -39617845, 19762640},
|
||||
.iir_coef[0].coef_a={16777216, -33333946, 16557454},
|
||||
|
||||
.iir_coef[1].coef_b={9751459, -17329625, 7727703},
|
||||
.iir_coef[1].coef_a={16777216, -17329625, 701946},
|
||||
|
||||
.iir_coef[2].coef_b={18001809, -32843215, 14866746},
|
||||
.iir_coef[2].coef_a={16777216, -32843215, 16091339},
|
||||
|
||||
.iir_coef[3].coef_b={12659487, -24147313, 11526097},
|
||||
.iir_coef[3].coef_a={16777216, -32207342, 15468397},
|
||||
|
||||
.iir_coef[4].coef_b={16490453, -32048020, 15620931},
|
||||
.iir_coef[4].coef_a={16777216, -32048020, 15334169},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
/*
|
||||
//ff
|
||||
|
||||
|
||||
Filter1_B=[ 42465729, -84858529, 42392831];
|
||||
Filter1_A=[ 134217728, -268346271, 134128558];
|
||||
|
||||
Filter2_B=[ 136159949, -267039705, 130899919];
|
||||
Filter2_A=[ 134217728, -267039705, 132842140];
|
||||
|
||||
Filter3_B=[ 132746107, -263254540, 130599907];
|
||||
Filter3_A=[ 134217728, -263254540, 129128286];
|
||||
|
||||
Filter4_B=[ 131402980, -255575175, 125032243];
|
||||
Filter4_A=[ 134217728, -255575175, 122217496];
|
||||
|
||||
|
||||
|
||||
*/
|
||||
|
||||
|
||||
|
||||
static const struct_anc_cfg POSSIBLY_UNUSED AncFirCoef_44p1k_mode0 = {
|
||||
.anc_cfg_ff_l = {
|
||||
// .total_gain = 440,
|
||||
.total_gain =312,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=IIR_COUNTER_FF_L,
|
||||
|
||||
.iir_coef[0].coef_b={42465729, -84858529, 42392831},
|
||||
.iir_coef[0].coef_a={134217728, -268346271, 134128558},
|
||||
|
||||
.iir_coef[1].coef_b={136159949, -267039705, 130899919},
|
||||
.iir_coef[1].coef_a={134217728, -267039705, 132842140},
|
||||
|
||||
.iir_coef[2].coef_b={132746107, -263254540, 130599907},
|
||||
.iir_coef[2].coef_a={134217728, -263254540, 129128286},
|
||||
|
||||
.iir_coef[3].coef_b={131402980, -255575175, 125032243},
|
||||
.iir_coef[3].coef_a={ 134217728, -255575175, 122217496},
|
||||
|
||||
.iir_coef[4].coef_b={0x8000000,0,0},
|
||||
.iir_coef[4].coef_a={0x8000000,0,0},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
.anc_cfg_ff_r = {
|
||||
// .total_gain = 382,
|
||||
.total_gain = 288,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=IIR_COUNTER_FF_R,
|
||||
|
||||
.iir_coef[0].coef_b={42465729, -84858529, 42392831},
|
||||
.iir_coef[0].coef_a={134217728, -268346271, 134128558},
|
||||
|
||||
.iir_coef[1].coef_b={136159949, -267039705, 130899919},
|
||||
.iir_coef[1].coef_a={134217728, -267039705, 132842140},
|
||||
|
||||
.iir_coef[2].coef_b={132746107, -263254540, 130599907},
|
||||
.iir_coef[2].coef_a={134217728, -263254540, 129128286},
|
||||
|
||||
.iir_coef[3].coef_b={131402980, -255575175, 125032243},
|
||||
.iir_coef[3].coef_a={ 134217728, -255575175, 122217496},
|
||||
|
||||
.iir_coef[4].coef_b={0x8000000,0,0},
|
||||
.iir_coef[4].coef_a={0x8000000,0,0},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
|
||||
/*
|
||||
|
||||
Filter1_B=[ 26719020, -52852829, 26204379];
|
||||
Filter1_A=[ 134217728, -210410903, 76474119];
|
||||
|
||||
Filter2_B=[ 138909433, -267471808, 128584365];
|
||||
Filter2_A=[ 134217728, -267471808, 133276071];
|
||||
|
||||
Filter3_B=[ 134542733, -268138827, 133597115];
|
||||
Filter3_A=[ 134217728, -268138827, 133922120];
|
||||
|
||||
Filter4_B=[ 133541379, -264235686, 130815458];
|
||||
Filter4_A=[ 134217728, -264235686, 130139109];
|
||||
|
||||
*/
|
||||
|
||||
|
||||
.anc_cfg_fb_l = {
|
||||
.total_gain = 511,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=IIR_COUNTER_FB_L,
|
||||
|
||||
.iir_coef[0].coef_b={26719020, -52852829, 26204379},
|
||||
.iir_coef[0].coef_a={134217728, -210410903, 76474119},
|
||||
|
||||
.iir_coef[1].coef_b={138909433, -267471808, 128584365},
|
||||
.iir_coef[1].coef_a={134217728, -267471808, 133276071},
|
||||
|
||||
.iir_coef[2].coef_b={134542733, -268138827, 133597115},
|
||||
.iir_coef[2].coef_a={134217728, -268138827, 133922120},
|
||||
|
||||
.iir_coef[3].coef_b={133541379, -264235686, 130815458},
|
||||
.iir_coef[3].coef_a={134217728, -264235686, 130139109},
|
||||
|
||||
.iir_coef[4].coef_b={0x8000000,0,0},
|
||||
.iir_coef[4].coef_a={0x8000000,0,0},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
.anc_cfg_fb_r = {
|
||||
.total_gain = 511,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=IIR_COUNTER_FB_R,
|
||||
|
||||
.iir_coef[0].coef_b={26719020, -52852829, 26204379},
|
||||
.iir_coef[0].coef_a={134217728, -210410903, 76474119},
|
||||
|
||||
.iir_coef[1].coef_b={138909433, -267471808, 128584365},
|
||||
.iir_coef[1].coef_a={134217728, -267471808, 133276071},
|
||||
|
||||
.iir_coef[2].coef_b={134542733, -268138827, 133597115},
|
||||
.iir_coef[2].coef_a={134217728, -268138827, 133922120},
|
||||
|
||||
.iir_coef[3].coef_b={133541379, -264235686, 130815458},
|
||||
.iir_coef[3].coef_a={134217728, -264235686, 130139109},
|
||||
|
||||
.iir_coef[4].coef_b={0x8000000,0,0},
|
||||
.iir_coef[4].coef_a={0x8000000,0,0},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
|
||||
/* .fir_bypass_flag=1,
|
||||
.fir_len = AUD_COEF_LEN,
|
||||
.fir_coef =
|
||||
{
|
||||
32767,
|
||||
},
|
||||
*/
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
#if (AUD_SECTION_STRUCT_VERSION == 2)
|
||||
|
||||
|
||||
|
||||
/*
|
||||
|
||||
Filter1_B=[ 19847881, -39594823, 19747071];
|
||||
Filter1_A=[ 16777216, -33314517, 16538159];
|
||||
|
||||
Filter2_B=[ 9442890, -16603187, 7330251];
|
||||
Filter2_A=[ 16777216, -16603187, -4075];
|
||||
|
||||
Filter3_B=[ 18107639, -32779315, 14701642];
|
||||
Filter3_A=[ 16777216, -32779315, 16032065];
|
||||
|
||||
Filter4_B=[ 12666347, -24058210, 11437046];
|
||||
Filter4_A=[ 16777216, -32089673, 15357640];
|
||||
|
||||
Filter5_B=[ 16466312, -31915122, 15523589];
|
||||
Filter5_A=[ 16777216, -31915122, 15212684];
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
.anc_cfg_mc_l = {
|
||||
.total_gain = 1228,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=5,
|
||||
|
||||
.iir_coef[0].coef_b={19847881, -39594823, 19747071},
|
||||
.iir_coef[0].coef_a={16777216, -33314517, 16538159},
|
||||
|
||||
.iir_coef[1].coef_b={9442890, -16603187, 7330251},
|
||||
.iir_coef[1].coef_a={16777216, -16603187, -4075},
|
||||
|
||||
.iir_coef[2].coef_b={18107639, -32779315, 14701642},
|
||||
.iir_coef[2].coef_a={16777216, -32779315, 16032065},
|
||||
|
||||
.iir_coef[3].coef_b={12666347, -24058210, 11437046},
|
||||
.iir_coef[3].coef_a={16777216, -32089673, 15357640},
|
||||
|
||||
.iir_coef[4].coef_b={16466312, -31915122, 15523589},
|
||||
.iir_coef[4].coef_a={16777216, -31915122, 15212684},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
.anc_cfg_mc_r = {
|
||||
.total_gain = 1331,
|
||||
|
||||
.iir_bypass_flag=0,
|
||||
.iir_counter=5,
|
||||
|
||||
.iir_coef[0].coef_b={19847881, -39594823, 19747071},
|
||||
.iir_coef[0].coef_a={16777216, -33314517, 16538159},
|
||||
|
||||
.iir_coef[1].coef_b={9442890, -16603187, 7330251},
|
||||
.iir_coef[1].coef_a={16777216, -16603187, -4075},
|
||||
|
||||
.iir_coef[2].coef_b={18107639, -32779315, 14701642},
|
||||
.iir_coef[2].coef_a={16777216, -32779315, 16032065},
|
||||
|
||||
.iir_coef[3].coef_b={12666347, -24058210, 11437046},
|
||||
.iir_coef[3].coef_a={16777216, -32089673, 15357640},
|
||||
|
||||
.iir_coef[4].coef_b={16466312, -31915122, 15523589},
|
||||
.iir_coef[4].coef_a={16777216, -31915122, 15212684},
|
||||
|
||||
.iir_coef[5].coef_b={0x8000000,0,0},
|
||||
.iir_coef[5].coef_a={0x8000000,0,0},
|
||||
|
||||
|
||||
.dac_gain_offset=0,
|
||||
.adc_gain_offset=(0)*4,
|
||||
},
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
const struct_anc_cfg * anc_coef_list_50p7k[ANC_COEF_LIST_NUM] = {
|
||||
&AncFirCoef_50p7k_mode0,
|
||||
#if (ANC_COEF_LIST_NUM == 2)
|
||||
&AncFirCoef_50p7k_mode0,
|
||||
#endif
|
||||
#if(ANC_COEF_LIST_NUM == 3)
|
||||
&AncFirCoef_50p7k_mode0,
|
||||
&AncFirCoef_50p7k_mode0,
|
||||
#endif
|
||||
#if(ANC_COEF_LIST_NUM == 4)
|
||||
&AncFirCoef_50p7k_mode0,
|
||||
&AncFirCoef_50p7k_mode0,
|
||||
&AncFirCoef_50p7k_mode0,
|
||||
#endif
|
||||
};
|
||||
|
||||
const struct_anc_cfg * anc_coef_list_48k[ANC_COEF_LIST_NUM] = {
|
||||
&AncFirCoef_48k_mode0,
|
||||
#if (ANC_COEF_LIST_NUM == 2)
|
||||
&AncFirCoef_48k_mode0,
|
||||
#endif
|
||||
#if(ANC_COEF_LIST_NUM == 3)
|
||||
&AncFirCoef_48k_mode0,
|
||||
&AncFirCoef_48k_mode0,
|
||||
#endif
|
||||
#if(ANC_COEF_LIST_NUM == 4)
|
||||
&AncFirCoef_48k_mode0,
|
||||
&AncFirCoef_48k_mode0,
|
||||
&AncFirCoef_48k_mode0,
|
||||
#endif
|
||||
};
|
||||
|
||||
const struct_anc_cfg * anc_coef_list_44p1k[ANC_COEF_LIST_NUM] = {
|
||||
&AncFirCoef_44p1k_mode0,
|
||||
#if (ANC_COEF_LIST_NUM == 2)
|
||||
&AncFirCoef_44p1k_mode0,
|
||||
#endif
|
||||
#if(ANC_COEF_LIST_NUM == 3)
|
||||
&AncFirCoef_44p1k_mode0,
|
||||
&AncFirCoef_44p1k_mode0,
|
||||
#endif
|
||||
#if(ANC_COEF_LIST_NUM == 4)
|
||||
&AncFirCoef_44p1k_mode0,
|
||||
&AncFirCoef_44p1k_mode0,
|
||||
&AncFirCoef_44p1k_mode0,
|
||||
#endif
|
||||
};
|
||||
|
||||
const IIR_CFG_T audio_eq_sw_iir_cfg = {
|
||||
.gain0 = 0,
|
||||
.gain1 = 0,
|
||||
|
|
|
|||
|
|
@ -383,6 +383,8 @@ void app_bt_sleep(APP_KEY_STATUS *status, void *param)
|
|||
a2dp_handleKey(AVRCP_KEY_PAUSE);
|
||||
}
|
||||
|
||||
|
||||
|
||||
void app_wakeup_sleep(APP_KEY_STATUS *status, void *param)
|
||||
{
|
||||
TRACE(3,"%s %d,%d",__func__, status->code, status->event);
|
||||
|
|
@ -613,15 +615,19 @@ void app_ibrt_ui_test_voice_assistant_key(APP_KEY_STATUS *status, void *param)
|
|||
const APP_KEY_HANDLE app_ibrt_ui_test_key_cfg[] =
|
||||
{
|
||||
|
||||
#if defined( __BT_ANC_KEY__)&&defined(ANC_APP)
|
||||
{{APP_KEY_CODE_PWR,APP_KEY_EVENT_CLICK},"bt anc key",app_anc_key, NULL},
|
||||
#if defined(ANC_APP)
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(__BT_ANC_KEY__)&&defined(ANC_APP)
|
||||
//{{APP_KEY_CODE_PWR,APP_KEY_EVENT_CLICK},"bt anc key",app_anc_key, NULL},
|
||||
{{APP_KEY_CODE_PWR,APP_KEY_EVENT_LONGPRESS},"app_ibrt_ui_test_key", app_anc_key, NULL},
|
||||
#else
|
||||
//{{APP_KEY_CODE_PWR,APP_KEY_EVENT_CLICK},"app_ibrt_ui_test_key", app_ibrt_ui_test_key, NULL},
|
||||
#endif
|
||||
|
||||
{{APP_KEY_CODE_PWR,APP_KEY_EVENT_UP},"app_ibrt_ui_test_key", app_bt_sleep, NULL},
|
||||
{{APP_KEY_CODE_PWR,APP_KEY_EVENT_LONGLONGPRESS},"app_ibrt_ui_test_key", app_ibrt_ui_test_key, NULL},
|
||||
{{APP_KEY_CODE_PWR,APP_KEY_EVENT_DOUBLECLICK},"app_ibrt_ui_test_key", app_ibrt_ui_test_key, NULL},
|
||||
{{APP_KEY_CODE_PWR,APP_KEY_EVENT_CLICK},"app_ibrt_ui_test_key", app_bt_sleep, NULL},
|
||||
{{APP_KEY_CODE_PWR,APP_KEY_EVENT_DOUBLECLICK},"app_ibrt_ui_test_key", app_wakeup_sleep, NULL},
|
||||
{{APP_KEY_CODE_PWR,APP_KEY_EVENT_TRIPLECLICK},"app_ibrt_ui_test_key", app_ibrt_ui_test_key, NULL},
|
||||
{{APP_KEY_CODE_PWR,APP_KEY_EVENT_ULTRACLICK},"app_ibrt_ui_test_key", app_ibrt_ui_test_key, NULL},
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue