98 lines
3 KiB
C
98 lines
3 KiB
C
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/***************************************************************************
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*
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* Copyright 2015-2019 BES.
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* All rights reserved. All unpublished rights reserved.
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*
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* No part of this work may be used or reproduced in any form or by any
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* means, or stored in a database or retrieval system, without prior written
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* permission of BES.
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*
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* Use of this work is governed by a license granted by BES.
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* This work contains confidential and proprietary information of
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* BES. which is protected by copyright, trade secret,
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* trademark and other intellectual property rights.
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*
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****************************************************************************/
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#ifndef __HAL_TDM_H__
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#define __HAL_TDM_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "reg_tdm.h"
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#include "hal_i2s.h"
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#define TDM_BUF_ALIGN __attribute__((aligned(0x100)))
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enum HAL_TDM_ENABLE_T {
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HAL_TDM_DISABLE,
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HAL_TDM_ENABLE,
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HAL_TDM_ENABLE_NUM,
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};
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enum HAL_TDM_MODE_T {
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HAL_TDM_MODE_FS_ASSERTED_AT_FIRST,
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HAL_TDM_MODE_FS_ASSERTED_AT_LAST,
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HAL_TDM_MODE_NUM,
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};
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enum HAL_TDM_FS_EDGE_T {
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HAL_TDM_FS_EDGE_POSEDGE,
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HAL_TDM_FS_EDGE_NEGEDGE,
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HAL_TDM_FS_EDGE_NUM,
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};
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enum HAL_TDM_CYCLES_T {
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HAL_TDM_CYCLES_16 = 16,
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HAL_TDM_CYCLES_32 = 32,
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HAL_TDM_CYCLES_64 = 64,
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HAL_TDM_CYCLES_128 = 128,
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HAL_TDM_CYCLES_256 = 256,
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HAL_TDM_CYCLES_512 = 512,
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};
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enum HAL_TDM_FS_CYCLES {
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HAL_TDM_FS_CYCLES_ONE_LESS = 0,
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HAL_TDM_FS_CYCLES_1 = 1,
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HAL_TDM_FS_CYCLES_8 = 8,
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HAL_TDM_FS_CYCLES_16 = 16,
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HAL_TDM_FS_CYCLES_32 = 32,
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HAL_TDM_FS_CYCLES_64 = 64,
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HAL_TDM_FS_CYCLES_128 = 128,
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HAL_TDM_FS_CYCLES_256 = 256,
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};
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enum HAL_TDM_SLOT_CYCLES_T {
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HAL_TDM_SLOT_CYCLES_32 = 32,
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HAL_TDM_SLOT_CYCLES_16 = 16,
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};
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struct HAL_TDM_CONFIG_T {
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enum HAL_TDM_MODE_T mode;
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enum HAL_TDM_FS_EDGE_T edge;
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enum HAL_TDM_CYCLES_T cycles;
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enum HAL_TDM_FS_CYCLES fs_cycles;
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enum HAL_TDM_SLOT_CYCLES_T slot_cycles;
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uint32_t data_offset;
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bool sync_start;
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};
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int32_t hal_tdm_open(enum HAL_I2S_ID_T i2s_id,enum AUD_STREAM_T stream,enum HAL_I2S_MODE_T mode);
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int32_t hal_tdm_setup_stream(enum HAL_I2S_ID_T i2s_id,
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enum AUD_STREAM_T stream,
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uint32_t sample_rate,
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struct HAL_TDM_CONFIG_T *tdm_cfg);
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int32_t hal_tdm_as_i2s_setup_stream(enum HAL_I2S_ID_T i2s_id,
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enum AUD_STREAM_T stream,
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uint32_t sample_rate);
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int32_t hal_tdm_start_stream(enum HAL_I2S_ID_T i2s_id, enum AUD_STREAM_T stream);
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int32_t hal_tdm_stop_stream(enum HAL_I2S_ID_T i2s_id, enum AUD_STREAM_T stream);
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int32_t hal_tdm_close(enum HAL_I2S_ID_T i2s_id, enum AUD_STREAM_T stream);
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void hal_tdm_get_config(enum HAL_I2S_ID_T i2s_id,struct HAL_TDM_CONFIG_T *tdm_cfg);
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void hal_tdm_set_config(enum HAL_I2S_ID_T i2s_id,struct HAL_TDM_CONFIG_T *tdm_cfg);
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#ifdef __cplusplus
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}
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#endif
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#endif // __HAL_TDM_H__
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