235 lines
6.4 KiB
C
235 lines
6.4 KiB
C
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/***************************************************************************
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*
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* Copyright 2015-2019 BES.
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* All rights reserved. All unpublished rights reserved.
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*
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* No part of this work may be used or reproduced in any form or by any
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* means, or stored in a database or retrieval system, without prior written
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* permission of BES.
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*
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* Use of this work is governed by a license granted by BES.
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* This work contains confidential and proprietary information of
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* BES. which is protected by copyright, trade secret,
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* trademark and other intellectual property rights.
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*
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****************************************************************************/
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#ifndef __HAL_IOMUX_BEST2300P_H__
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#define __HAL_IOMUX_BEST2300P_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "plat_types.h"
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#ifndef ROM_BUILD
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#define PMU_HAS_LED_PIN
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#endif
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enum HAL_IOMUX_PIN_T {
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HAL_IOMUX_PIN_P0_0 = 0,
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HAL_IOMUX_PIN_P0_1,
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HAL_IOMUX_PIN_P0_2,
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HAL_IOMUX_PIN_P0_3,
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HAL_IOMUX_PIN_P0_4,
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HAL_IOMUX_PIN_P0_5,
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HAL_IOMUX_PIN_P0_6,
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HAL_IOMUX_PIN_P0_7,
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HAL_IOMUX_PIN_P1_0,
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HAL_IOMUX_PIN_P1_1,
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HAL_IOMUX_PIN_P1_2,
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HAL_IOMUX_PIN_P1_3,
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HAL_IOMUX_PIN_P1_4,
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HAL_IOMUX_PIN_P1_5,
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HAL_IOMUX_PIN_P1_6,
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HAL_IOMUX_PIN_P1_7,
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HAL_IOMUX_PIN_P2_0,
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HAL_IOMUX_PIN_P2_1,
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HAL_IOMUX_PIN_P2_2,
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HAL_IOMUX_PIN_P2_3,
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HAL_IOMUX_PIN_P2_4,
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HAL_IOMUX_PIN_P2_5,
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HAL_IOMUX_PIN_P2_6,
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HAL_IOMUX_PIN_P2_7,
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HAL_IOMUX_PIN_P3_0,
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HAL_IOMUX_PIN_P3_1,
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HAL_IOMUX_PIN_P3_2,
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HAL_IOMUX_PIN_P3_3,
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HAL_IOMUX_PIN_P3_4,
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HAL_IOMUX_PIN_P3_5,
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HAL_IOMUX_PIN_P3_6,
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HAL_IOMUX_PIN_P3_7,
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HAL_IOMUX_PIN_NUM,
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HAL_IOMUX_PIN_LED1 = HAL_IOMUX_PIN_NUM,
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HAL_IOMUX_PIN_LED2,
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HAL_IOMUX_PIN_LED_NUM,
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};
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enum HAL_GPIO_PIN_T {
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HAL_GPIO_PIN_P0_0 = HAL_IOMUX_PIN_P0_0,
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HAL_GPIO_PIN_P0_1 = HAL_IOMUX_PIN_P0_1,
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HAL_GPIO_PIN_P0_2 = HAL_IOMUX_PIN_P0_2,
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HAL_GPIO_PIN_P0_3 = HAL_IOMUX_PIN_P0_3,
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HAL_GPIO_PIN_P0_4 = HAL_IOMUX_PIN_P0_4,
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HAL_GPIO_PIN_P0_5 = HAL_IOMUX_PIN_P0_5,
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HAL_GPIO_PIN_P0_6 = HAL_IOMUX_PIN_P0_6,
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HAL_GPIO_PIN_P0_7 = HAL_IOMUX_PIN_P0_7,
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HAL_GPIO_PIN_P1_0 = HAL_IOMUX_PIN_P1_0,
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HAL_GPIO_PIN_P1_1 = HAL_IOMUX_PIN_P1_1,
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HAL_GPIO_PIN_P1_2 = HAL_IOMUX_PIN_P1_2,
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HAL_GPIO_PIN_P1_3 = HAL_IOMUX_PIN_P1_3,
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HAL_GPIO_PIN_P1_4 = HAL_IOMUX_PIN_P1_4,
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HAL_GPIO_PIN_P1_5 = HAL_IOMUX_PIN_P1_5,
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HAL_GPIO_PIN_P1_6 = HAL_IOMUX_PIN_P1_6,
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HAL_GPIO_PIN_P1_7 = HAL_IOMUX_PIN_P1_7,
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HAL_GPIO_PIN_P2_0 = HAL_IOMUX_PIN_P2_0,
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HAL_GPIO_PIN_P2_1 = HAL_IOMUX_PIN_P2_1,
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HAL_GPIO_PIN_P2_2 = HAL_IOMUX_PIN_P2_2,
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HAL_GPIO_PIN_P2_3 = HAL_IOMUX_PIN_P2_3,
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HAL_GPIO_PIN_P2_4 = HAL_IOMUX_PIN_P2_4,
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HAL_GPIO_PIN_P2_5 = HAL_IOMUX_PIN_P2_5,
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HAL_GPIO_PIN_P2_6 = HAL_IOMUX_PIN_P2_6,
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HAL_GPIO_PIN_P2_7 = HAL_IOMUX_PIN_P2_7,
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HAL_GPIO_PIN_P3_0 = HAL_IOMUX_PIN_P3_0,
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HAL_GPIO_PIN_P3_1 = HAL_IOMUX_PIN_P3_1,
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HAL_GPIO_PIN_P3_2 = HAL_IOMUX_PIN_P3_2,
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HAL_GPIO_PIN_P3_3 = HAL_IOMUX_PIN_P3_3,
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HAL_GPIO_PIN_P3_4 = HAL_IOMUX_PIN_P3_4,
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HAL_GPIO_PIN_P3_5 = HAL_IOMUX_PIN_P3_5,
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HAL_GPIO_PIN_P3_6 = HAL_IOMUX_PIN_P3_6,
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HAL_GPIO_PIN_P3_7 = HAL_IOMUX_PIN_P3_7,
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HAL_GPIO_PIN_NUM = HAL_IOMUX_PIN_NUM,
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HAL_GPIO_PIN_LED1 = HAL_IOMUX_PIN_LED1,
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HAL_GPIO_PIN_LED2 = HAL_IOMUX_PIN_LED2,
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HAL_GPIO_PIN_LED_NUM = HAL_IOMUX_PIN_LED_NUM,
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};
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enum HAL_IOMUX_FUNCTION_T {
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HAL_IOMUX_FUNC_NONE = 0,
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HAL_IOMUX_FUNC_GPIO,
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HAL_IOMUX_FUNC_AS_GPIO = HAL_IOMUX_FUNC_GPIO,
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HAL_IOMUX_FUNC_BT_UART_CTS,
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HAL_IOMUX_FUNC_BT_UART_RTS,
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HAL_IOMUX_FUNC_BT_UART_RX,
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HAL_IOMUX_FUNC_BT_UART_TX,
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HAL_IOMUX_FUNC_CLK_32K_IN,
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HAL_IOMUX_FUNC_CLK_REQ_IN,
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HAL_IOMUX_FUNC_CLK_REQ_OUT,
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HAL_IOMUX_FUNC_CLK_OUT,
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HAL_IOMUX_FUNC_I2C_M0_SCL,
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HAL_IOMUX_FUNC_I2C_M0_SDA,
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HAL_IOMUX_FUNC_I2C_M1_SCL,
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HAL_IOMUX_FUNC_I2C_M1_SDA,
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HAL_IOMUX_FUNC_I2C_SCL,
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HAL_IOMUX_FUNC_I2C_SDA,
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HAL_IOMUX_FUNC_I2S0_MCLK,
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HAL_IOMUX_FUNC_I2S0_SCK,
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HAL_IOMUX_FUNC_I2S0_SDI0,
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HAL_IOMUX_FUNC_I2S0_SDO,
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HAL_IOMUX_FUNC_I2S0_WS,
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HAL_IOMUX_FUNC_I2S1_MCLK,
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HAL_IOMUX_FUNC_I2S1_SCK,
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HAL_IOMUX_FUNC_I2S1_SDI0,
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HAL_IOMUX_FUNC_I2S1_SDO,
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HAL_IOMUX_FUNC_I2S1_WS,
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HAL_IOMUX_FUNC_PCM_CLK,
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HAL_IOMUX_FUNC_PCM_DI,
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HAL_IOMUX_FUNC_PCM_DO,
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HAL_IOMUX_FUNC_PCM_FSYNC,
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HAL_IOMUX_FUNC_PDM0_CK,
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HAL_IOMUX_FUNC_PDM0_D,
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HAL_IOMUX_FUNC_PDM1_CK,
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HAL_IOMUX_FUNC_PDM1_D,
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HAL_IOMUX_FUNC_PDM2_CK,
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HAL_IOMUX_FUNC_PDM2_D,
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HAL_IOMUX_FUNC_PWM0,
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HAL_IOMUX_FUNC_PWM1,
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HAL_IOMUX_FUNC_PWM2,
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HAL_IOMUX_FUNC_PWM3,
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HAL_IOMUX_FUNC_SDMMC_CLK,
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HAL_IOMUX_FUNC_SDMMC_CMD,
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HAL_IOMUX_FUNC_SDMMC_DATA0,
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HAL_IOMUX_FUNC_SDMMC_DATA1,
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HAL_IOMUX_FUNC_SDMMC_DATA2,
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HAL_IOMUX_FUNC_SDMMC_DATA3,
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HAL_IOMUX_FUNC_SDMMC_DATA4,
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HAL_IOMUX_FUNC_SDMMC_DATA5,
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HAL_IOMUX_FUNC_SDMMC_DATA6,
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HAL_IOMUX_FUNC_SDMMC_DATA7,
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HAL_IOMUX_FUNC_SPDIF0_DI,
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HAL_IOMUX_FUNC_SPDIF0_DO,
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HAL_IOMUX_FUNC_SPI_CLK,
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HAL_IOMUX_FUNC_SPI_CS0,
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HAL_IOMUX_FUNC_SPI_CS1,
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HAL_IOMUX_FUNC_SPI_CS2,
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HAL_IOMUX_FUNC_SPI_CS3,
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HAL_IOMUX_FUNC_SPI_DCN,
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HAL_IOMUX_FUNC_SPI_DI0,
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HAL_IOMUX_FUNC_SPI_DI1,
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HAL_IOMUX_FUNC_SPI_DI2,
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HAL_IOMUX_FUNC_SPI_DI3,
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HAL_IOMUX_FUNC_SPI_DIO,
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HAL_IOMUX_FUNC_SPILCD_CLK,
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HAL_IOMUX_FUNC_SPILCD_CS0,
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HAL_IOMUX_FUNC_SPILCD_CS1,
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HAL_IOMUX_FUNC_SPILCD_CS2,
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HAL_IOMUX_FUNC_SPILCD_CS3,
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HAL_IOMUX_FUNC_SPILCD_DCN,
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HAL_IOMUX_FUNC_SPILCD_DI0,
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HAL_IOMUX_FUNC_SPILCD_DI1,
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HAL_IOMUX_FUNC_SPILCD_DI2,
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HAL_IOMUX_FUNC_SPILCD_DI3,
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HAL_IOMUX_FUNC_SPILCD_DIO,
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HAL_IOMUX_FUNC_UART0_RX,
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HAL_IOMUX_FUNC_UART0_TX,
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HAL_IOMUX_FUNC_UART1_CTS,
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HAL_IOMUX_FUNC_UART1_RTS,
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HAL_IOMUX_FUNC_UART1_RX,
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HAL_IOMUX_FUNC_UART1_TX,
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HAL_IOMUX_FUNC_UART2_RX,
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HAL_IOMUX_FUNC_UART2_TX,
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HAL_IOMUX_FUNC_END
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};
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enum HAL_IOMUX_ISPI_ACCESS_T {
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HAL_IOMUX_ISPI_BT_RF = (1 << 0),
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HAL_IOMUX_ISPI_BT_PMU = (1 << 1),
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HAL_IOMUX_ISPI_BT_ANA = (1 << 2),
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HAL_IOMUX_ISPI_MCU_RF = (1 << 3),
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HAL_IOMUX_ISPI_MCU_PMU = (1 << 4),
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HAL_IOMUX_ISPI_MCU_ANA = (1 << 5),
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};
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void hal_iomux_set_i2s_mclk(void);
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void hal_iomux_set_i2s1(void);
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void hal_iomux_set_mcu_clock_out(void);
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void hal_iomux_set_bt_clock_out(void);
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int hal_iomux_tportopen(void);
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int hal_iomux_tportclr(int port);
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int hal_iomux_tportset(int port);
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#ifdef __cplusplus
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}
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#endif
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#endif
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