337 lines
14 KiB
C
337 lines
14 KiB
C
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/***************************************************************************
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*
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* Copyright 2015-2019 BES.
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* All rights reserved. All unpublished rights reserved.
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*
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* No part of this work may be used or reproduced in any form or by any
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* means, or stored in a database or retrieval system, without prior written
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* permission of BES.
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*
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* Use of this work is governed by a license granted by BES.
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* This work contains confidential and proprietary information of
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* BES. which is protected by copyright, trade secret,
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* trademark and other intellectual property rights.
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*
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****************************************************************************/
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#ifndef __BT_DRV_REG_OP_H__
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#define __BT_DRV_REG_OP_H__
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#include <stdio.h>
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#include "stdint.h"
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#include "stdbool.h"
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#include "plat_types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct
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{
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int8_t rssi;
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uint8_t rxgain;
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} rx_agc_t;
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typedef struct
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{
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uint8_t agc_idx0;
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int8_t rssi0;
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int8_t rssi0_max;
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int8_t rssi0_min;
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uint8_t agc_idx1;
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int8_t rssi1;
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int8_t rssi1_max;
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int8_t rssi1_min;
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uint8_t agc_idx2;
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int8_t rssi2;
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int8_t rssi2_max;
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int8_t rssi2_min;
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uint16_t ser;
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uint16_t rx_data_sum;
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} __attribute__((packed)) rssi_t;
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struct ld_afh_env
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{
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/// RSSI threshold for interference detection (in dBm)
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int8_t rf_rssi_interf_thr;
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/// AFH update period (in sec)
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uint8_t afh_update_period;
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/// Maximum duration without receiving a packet before considering a channel quality unknown (in slots) (2 secs)
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uint16_t afh_access_valid_to;
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/// Maximum duration without receiving a packet before reintroducing a channel to the map (in slots) (20 secs)
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uint16_t afh_reaccess_to;
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/// Maximum counter value for channel assessment
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int8_t afh_access_count_max;
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/// Counter threshold to consider a channel good
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int8_t afh_access_count_thr_good;
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/// Counter threshold to consider a channel bad
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int8_t afh_access_count_thr_bad;
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/// Minimum counter value for channel assessment
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int8_t afh_access_count_min;
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};
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/// RSSI threshold for interference detection (in dBm)
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#define BT_AFH_RSSI_INTERF_THR (-70)
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/// AFH update period (in sec)
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#define BT_AFH_UPDATE_PERIOD 4
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/// Maximum duration without receiving a packet before considering a channel quality unknown (in slots) (2 secs)
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#define BT_AFH_ASSESS_VALID_TO 0x1900
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/// Maximum duration without receiving a packet before reintroducing a channel to the map (in slots) (20 secs)
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#define BT_AFH_REASSESS_TO 0x7D00
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/// Maximum counter value for channel assessment
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#define BT_AFH_ASSESS_COUNT_MAX 4
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/// Counter threshold to consider a channel good
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#define BT_AFH_ASSESS_COUNT_THR_GOOD 2
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/// Counter threshold to consider a channel bad
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#define BT_AFH_ASSESS_COUNT_THR_BAD -2
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/// Minimum counter value for channel assessment
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#define BT_AFH_ASSESS_COUNT_MIN -4
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#define RETX_NB_0 0
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#define RETX_NB_1 1
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#define RETX_NB_2 2
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#define RETX_NEGO 3
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#ifdef CHIP_BEST2000
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#define MIC_BUFF_ADRR_REG (0xc0000040)
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#define RX_BUFF_ADRR (0xc0000044)
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#elif defined(CHIP_BEST1400) || defined(CHIP_BEST1402) || defined(CHIP_BEST2300P)
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#define MIC_BUFF_ADRR_REG (0xc0000058)
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#define RX_BUFF_ADRR (0xc000005c)
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#elif defined(CHIP_BEST2300A)
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#define MIC_BUFF_ADRR_REG (0xc0000058)
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#define RX_BUFF_INFO_ADRR (0xc000005c)
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#define RX_BUFF_ADRR (*(volatile uint32_t *)(RX_BUFF_INFO_ADRR))
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#endif
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//BT acl tx silence
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#define TX_SILENCE_ON 1
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#define TX_SILENCE_OFF 0
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struct dbg_set_ebq_test
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{
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uint8_t ebq_testmode;
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uint8_t ble_set_privacy_mode;
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uint8_t ll_con_ini_bv2324;
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uint8_t ll_con_ini_bv2021;
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uint8_t ll_ddi_scn_bv26;
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uint8_t ll_sec_adv_bv05;
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uint8_t ll_sync_win_default;
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uint8_t auth_end_notify_host_lk;
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uint8_t ll_sec_adv_bv09;
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uint8_t ll_sec_adv_bv17;
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uint8_t ll_sec_adv_bv1819;
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uint8_t LocEncKeyRefresh;
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uint8_t publickey_check;
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uint8_t Qos;
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uint8_t hv1;
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uint8_t ssr;
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uint8_t aes_ccm_daycounter;
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uint8_t bb_prot_flh_bv01;
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uint8_t bb_prot_arq_bv43;
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uint8_t pause_aes_generate_rand;
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};
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void bt_drv_reg_op_rssi_set(uint16_t rssi);
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void bt_drv_reg_op_scan_intv_set(uint32_t scan_intv);
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void bt_drv_reg_op_encryptchange_errcode_reset(uint16_t hci_handle);
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void bt_drv_reg_op_sco_sniffer_checker(void);
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void bt_drv_reg_op_trigger_time_checker(void);
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void bt_drv_reg_op_tws_output_power_fix_separate(uint16_t hci_handle, uint16_t pwr);
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bool bt_drv_reg_op_ld_sniffer_env_monitored_dev_state_get(void);
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void bt_drv_reg_op_ld_sniffer_env_monitored_dev_state_set(bool state);
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void bt_drv_reg_op_ld_sniffer_master_addr_set(uint8_t * addr);
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int bt_drv_reg_op_currentfreeaclbuf_get(void);
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void bt_drv_reg_op_save_mobile_airpath_info(uint16_t hciHandle);
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void bt_drv_reg_op_block_xfer_with_mobile(uint16_t hciHandle);
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void bt_drv_reg_op_resume_xfer_with_mobile(uint16_t hciHandle);
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void bt_drv_reg_op_block_fast_ack_with_mobile(void);
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void bt_drv_reg_op_resume_fast_ack_with_mobile(void);
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int bt_drv_reg_op_packet_type_checker(uint16_t hciHandle);
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void bt_drv_reg_op_max_slot_setting_checker(uint16_t hciHandle);
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void bt_drv_reg_op_force_task_dbg_idle(void);
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void bt_drv_reg_op_afh_follow_mobile_mobileidx_set(uint16_t hciHandle);
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void bt_drv_reg_op_afh_follow_mobile_twsidx_set(uint16_t hciHandle);
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void bt_drv_reg_op_sco_status_store(void);
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void bt_drv_reg_op_sco_status_restore(void);
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bool bt_drv_reg_op_sco_tx_buf_restore(uint8_t *trigger_test);
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void bt_drv_reg_op_afh_bak_reset(void);
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void bt_drv_reg_op_afh_bak_save(uint8_t role, uint16_t mobileHciHandle);
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void bt_drv_reg_op_connection_checker(void);
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void bt_drv_reg_op_bt_info_checker(void);
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uint8_t bt_drv_reg_op_get_controller_tx_free_buffer(void);
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uint8_t bt_drv_reg_op_get_controller_ble_tx_free_buffer(void);
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void bt_drv_reg_op_ble_buffer_cleanup(void);
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bool bt_drv_reg_op_get_dbg_state(void);
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void bt_drv_reg_op_crash_dump(void);
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void bt_drv_reg_op_set_tx_pwr(uint16_t connHandle, uint8_t txpwr);
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uint8_t bt_drv_reg_op_get_tx_pwr(uint16_t connHandle);
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void bt_drv_reg_op_fix_tx_pwr(uint16_t connHandle);
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void bt_drv_reg_op_lsto_hack(uint16_t hciHandle, uint16_t lsto);
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uint16_t bt_drv_reg_op_get_lsto(uint16_t hciHandle);
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void bt_drv_reg_op_enable_emsack_mode(uint16_t connHandle, uint8_t master, uint8_t enable);
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void bt_drv_reg_op_set_accessible_mode(uint8_t mode);
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void bt_drv_reg_op_force_sco_retrans(bool enable);
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void bt_drv_reg_op_enable_pcm_tx_hw_cal(void);
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void bt_drv_reg_op_monitor_clk(void);
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bool bt_drv_reg_op_read_rssi_in_dbm(uint16_t connHandle,rx_agc_t* rx_val);
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bool bt_drv_reg_op_read_ble_rssi_in_dbm(uint16_t connHandle,rx_agc_t* rx_val);
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void bt_drv_reg_op_set_swagc_mode(uint8_t mode);
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void bt_drv_reg_op_set_reboot_pairing_mode(uint8_t mode);
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void bt_drv_reg_op_acl_silence(uint16_t connHandle, uint8_t silence);
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void bt_drv_reg_op_call_monitor(uint16_t connHandle, uint8_t tws_role);
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void bt_drv_reg_op_lock_sniffer_sco_resync(void);
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void bt_drv_reg_op_unlock_sniffer_sco_resync(void);
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void bt_drv_reg_op_afh_set_default(void);
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void bt_drv_reg_op_update_sniffer_bitoffset(uint16_t mobile_conhdl,uint16_t master_conhdl);
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void bt_drv_reg_op_modify_bitoff_timer(uint16_t time_out);
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uint16_t em_bt_bitoff_getf(int elt_idx);
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void bt_drv_reg_op_ble_llm_substate_hacker(void);
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void bt_drv_reg_op_esco_acl_sniff_delay_cal(uint16_t hciHandle,bool enable);
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bool bt_drv_reg_op_check_esco_acl_sniff_conflict(uint16_t hciHandle);
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void bt_drv_reg_op_set_tpoll(uint8_t linkid,uint16_t poll_interval);
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uint8_t bt_drv_reg_op_get_role(uint8_t linkid);
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int8_t bt_drv_reg_op_rssi_correction(int8_t rssi);
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void bt_drv_reg_set_rssi_seed(uint32_t seed);
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void bt_drv_reg_op_piconet_clk_offset_get(uint16_t connHandle, int32_t *clock_offset, uint16_t *bit_offset);
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void bt_drv_reg_op_sw_seq_filter(uint16_t connHandle);
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bool bt_drv_reg_op_check_bt_controller_state(void);
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void bt_drv_reg_op_dma_tc_clkcnt_get(uint32_t *btclk, uint16_t *btcnt);
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void bt_drv_reg_op_clean_flags_of_ble_and_sco(void);
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void bt_drv_reg_op_sco_txfifo_reset(uint16_t codec_id);
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void bt_drv_reg_op_ibrt_retx_att_nb_set(uint8_t retx_nb);
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void bt_drv_reg_op_acl_tx_type_set(uint16_t hciHandle, uint8_t slot_sel);
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void bt_drv_reg_op_acl_tx_type_trace(uint16_t hciHandle);
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uint8_t bt_drv_reg_op_acl_tx_type_get(uint16_t hciHandle, uint8_t* br_type, uint8_t* edr_type);
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void bt_drv_reg_op_lm_nb_sync_hacker(uint8_t sco_status);
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void bt_drv_reg_op_afh_env_reset(void);
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void bt_drv_reg_op_acl_tx_silence(uint16_t connHandle, uint8_t on);
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void bt_drv_reg_op_acl_tx_silence_clear(uint16_t connHandle);
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void bt_drv_reg_op_ibrt_env_reset(void);
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void btdrv_reg_op_set_private_tws_poll_interval(uint16_t poll_interval, uint16_t poll_interval_in_sco);
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void btdrv_reg_op_enable_private_tws_schedule(bool enable);
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void btdrv_reg_op_set_tws_link_duration(uint8_t slot_num);
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void bt_drv_reg_op_decrease_tx_pwr_when_reconnect(bool enable);
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void bt_drv_reg_op_controller_mem_log_config(void);
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void bt_drv_reg_op_clear_ibrt_snoop_status(void);
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uint8_t bt_drv_reg_op_linkcntl_aclltaddr_getf(uint16_t conhdl);
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uint8_t bt_drv_reg_op_sync_bt_param(uint8_t* param, uint16_t len);
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uint32_t bt_drv_reg_op_get_lc_env_ptr(uint16_t conhdl, uint8_t type);
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void bt_drv_reg_op_set_tws_link_id(uint8_t link_id);
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void bt_drv_reg_op_rx_slot_stop_lantency_checker(void);
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void bt_drv_reg_op_hack_max_slot(uint8_t link_id,uint8_t slot);
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void bt_drv_reg_op_fa_set(uint8_t en);
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bool bt_drv_reg_op_check_seq_pending_status(void);
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void bt_drv_reg_op_clear_seq_pending_status(void);
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void bt_dev_clear_verison_receive_flag(uint8_t linkid);
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void bt_drv_reg_op_fastack_status_checker(uint16_t conhdl);
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void bt_drv_reg_op_set_link_policy(uint8_t linkid, uint8_t policy);
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uint8_t bt_drv_reg_op_lmp_sco_hdl_get(uint16_t sco_handle);
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bool bt_drv_reg_op_lmp_sco_hdl_set(uint16_t sco_handle, uint8_t lmp_hdl);
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void bt_drv_reg_op_controller_state_checker(void);
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void bt_drv_reg_op_controller_ble_flow_checker(void);
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void bt_drv_reg_op_force_set_lc_state(uint16_t conhdl, uint8_t state);
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uint8_t bt_drv_reg_op_force_get_lc_state(uint16_t conhdl);
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void bt_drv_digital_config_for_ble_adv(bool en);
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void bt_drv_reg_op_fa_gain_direct_set(uint8_t gain_idx);
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uint8_t bt_drv_reg_op_fa_gain_direct_get(void);
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void bt_drv_reg_op_dgb_link_gain_ctrl_set(uint16_t connHandle, uint8_t bt_ble_mode, uint8_t gain_idx, uint8_t enable);
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void bt_drv_reg_op_dgb_link_gain_ctrl_clear(uint16_t connHandle, uint8_t bt_ble_mode);
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void bt_drv_reg_op_dgb_link_gain_ctrl_init(void);
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void bt_drv_reg_op_rx_gain_fix(uint16_t connHandle, uint8_t bt_ble_mode, uint8_t gain_idx, uint8_t enable, uint8_t table_idx);
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void bt_drv_reg_op_afh_follow_en(bool enable, uint8_t be_followed_link_id, uint8_t follow_link_id);
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/// Index for DM1 packet type (used in both BR and EDR)
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#define DM1_IDX 0
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/// Enhanced Data Rate packet types indexes (classified by packet size)
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#define DH1_2_IDX 1
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#define DH1_3_IDX 2
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#define DH3_2_IDX 3
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#define DH3_3_IDX 4
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#define DH5_2_IDX 5
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#define DH5_3_IDX 6
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#define USE_1_SLOT_PACKET 0x02
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#define USE_3_SLOT_PACKET 0x04
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#define USE_5_SLOT_PACKET 0x06
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///Sniffer sco status
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#define SNIFFER_SCO_STOP 0
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#define SNIFFER_SCO_START 1
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#define SNIFFER_SCO_RESTART 2
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#define SNIFFER_SCO_RESUME_AFTER_TO 3
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#define SNIFFER_ACL_DISCONNECT_STOP_SCO 4
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#define SNIFFER_IBRT_START 5
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#define SNIFFER_IBRT_STOP 6
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#define IDEL_CHECK 0xff
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enum REG_OP
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{
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READ_OP,
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WRITE_OP,
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};
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enum LC_ENV_TAG
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{
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LC_LINK_TAG,
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LC_INFO_TAG,
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LC_ENC_TAG,
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LC_AFH_TAG,
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LC_SP_TAG,
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LC_EPR_TAG,
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LC_EPC_TAG,
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};
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void bt_drv_reg_op_hw_sw_agc_select(uint8_t agc_mode);
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void bt_drv_reg_op_force_set_sniff_att(uint16_t conhdle);
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void bt_drv_reg_op_voice_settings_set(uint16_t voice_settings);
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void bt_drv_reg_op_host_buff_and_flow_ctl_set
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(uint16_t acl_pkt_len, uint16_t acl_pkt_num,uint16_t sync_pkt_len, uint16_t sync_pkt_num,bool flow_ctl_en);
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void bt_drv_reg_op_page_to_set(uint16_t page_to);
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void bt_drv_reg_op_btdm_address_set(uint8_t* bt_addr, uint8_t* ble_addr);
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void bt_drv_reg_op_evtmask_set(uint8_t ble_en);
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void bt_drv_reg_op_simplepair_mode_set(uint8_t en);
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void bt_drv_reg_op_class_of_dev_set(uint8_t* class_of_dev, uint8_t len);
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void bt_drv_reg_op_sleep_set(bool en);
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void bt_drv_reg_op_sco_fifo_reset(void);
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void bt_drv_reg_sco_fifo_dump(void);
|
||
|
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uint8_t bt_drv_reg_op_get_sync_id_op(uint8_t op, uint8_t sync_id);
|
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|
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void bt_drv_reg_op_set_agc_thd(bool isMaster, bool isSco);
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void bt_drv_reg_op_global_symbols_init(void);
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||
|
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void bt_drv_tx_pwr_init(void);
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|
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void bt_drv_tx_pwr_init_for_testmode(void);
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|
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void bt_drv_reg_op_set_ibrt_auto_accept_sco(bool en);
|
||
|
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void bt_drv_reg_op_update_dbg_state(void);
|
||
|
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void bt_drv_reg_op_set_ibrt_reject_sniff_req(bool en);
|
||
|
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uint8_t bt_drv_reg_op_get_esco_nego_airmode(uint8_t sco_link_id);
|
||
|
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void bt_drv_reg_op_hci_vender_ibrt_ll_monitor(uint8_t* ptr, uint16_t* p_sum_err,uint16_t* p_rx_total);
|
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|
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uint32_t bt_drv_reg_op_get_host_ref_clk(void);
|
||
|
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void bt_drv_reg_op_set_accept_new_mobile_enable(void);
|
||
|
|
void bt_drv_reg_op_clear_accept_new_mobile_enable(void);
|
||
|
|
void bt_drv_reg_op_ecc_softbit_process(uint16_t* p_conn_handle1,uint16_t* p_conn_handle2, uint16_t length, uint8_t *data);
|
||
|
|
void bt_drv_reg_op_ebq_test_setting(void);
|
||
|
|
void bt_drv_reg_op_hw_spi_en_setf(int elt_idx, uint8_t hwspien);
|
||
|
|
void bt_drv_enhance_fa_mode(bool enable);
|
||
|
|
void bt_drv_reg_op_set_rand_seed(uint32_t seed);
|
||
|
|
void bt_drv_reg_op_swagc_mode_set(uint8_t mode);
|
||
|
|
void bt_drv_reg_op_set_max_pwr_rcv(uint16_t connHandle);
|
||
|
|
void bt_drv_reg_op_key_gen_after_reset(bool enable);
|
||
|
|
uint8_t bt_drv_reg_op_bt_sync_swagc_en_get(void);
|
||
|
|
void bt_drv_reg_op_ble_sup_timeout_set(uint16_t ble_conhdl, uint16_t sup_to);
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif
|
||
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