530 lines
15 KiB
C++
530 lines
15 KiB
C++
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/***************************************************************************
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*
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* Copyright 2015-2019 BES.
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* All rights reserved. All unpublished rights reserved.
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*
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* No part of this work may be used or reproduced in any form or by any
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* means, or stored in a database or retrieval system, without prior written
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* permission of BES.
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*
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* Use of this work is governed by a license granted by BES.
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* This work contains confidential and proprietary information of
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* BES. which is protected by copyright, trade secret,
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* trademark and other intellectual property rights.
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*
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****************************************************************************/
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#ifdef CHIP_BEST1000
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#include "cmsis.h"
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#include "cmsis_os.h"
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#include "hal_trace.h"
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#include "fmdec.h"
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#include "hal_dma.h"
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#include "hal_timer.h"
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#include "hal_cmu.h"
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#include "hal_analogif.h"
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#include "hal_chipid.h"
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#include "audioflinger.h"
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#include "audiobuffer.h"
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#include "cqueue.h"
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#include "app_audio.h"
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#include "app_utils.h"
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#include "app_overlay.h"
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#include "string.h"
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#include "pmu.h"
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//#define FM_DEBUG 1
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#define FM_DIGITAL_REG(a) *(volatile uint32_t *)(a)
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#define fm_read_rf_reg(reg,val) hal_analogif_reg_read(reg,val)
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#define fm_write_rf_reg(reg,val) hal_analogif_reg_write(reg,val)
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#define FM_FRAME_NUM 4
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#define FM_SAMPLE_NUM NUMOFSAMPLE
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#ifdef ATAN2_HARDWARE
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#ifdef FM_NEWMODE
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#define FM_SAMPLE_BUFFER_SIZE (FM_FRAME_NUM*FM_SAMPLE_NUM*4)
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#else
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#define FM_SAMPLE_BUFFER_SIZE (FM_FRAME_NUM*FM_SAMPLE_NUM/2*4)
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#endif
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#else
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#define FM_SAMPLE_BUFFER_SIZE (FM_FRAME_NUM*FM_SAMPLE_NUM*4)
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#endif
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#define FM_AUDIO_BUFFER_SIZE (4096)
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extern int app_bt_stream_local_volume_get(void);
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static int32_t *fm_sample_buffer_p;
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static void fm_handler(uint8_t chan, uint32_t remains, uint32_t error, struct HAL_DMA_DESC_T *lli)
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{
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static int cnt = 0;
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int16_t fm_decbuf[(FM_SAMPLE_NUM/9)];
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FmDemodulate((int16_t *)(fm_sample_buffer_p +((cnt%FM_FRAME_NUM)*FM_SAMPLE_NUM)), fm_decbuf,FM_SAMPLE_NUM);
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cnt++;
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app_audio_pcmbuff_put((uint8_t *)fm_decbuf, (FM_SAMPLE_NUM/9)<<1);
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FmDemodulate((int16_t *)(fm_sample_buffer_p +((cnt%FM_FRAME_NUM)*FM_SAMPLE_NUM)), fm_decbuf,FM_SAMPLE_NUM);
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cnt++;
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app_audio_pcmbuff_put((uint8_t *)fm_decbuf, (FM_SAMPLE_NUM/9)<<1);
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#ifdef FM_DEBUG
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{
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static uint32_t preTicks;
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uint32_t diff_ticks = 0;
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uint32_t cur_ticks;
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cur_ticks = hal_sys_timer_get();
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if (!preTicks){
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preTicks = cur_ticks;
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}else{
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diff_ticks = TICKS_TO_MS(cur_ticks - preTicks);
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preTicks = cur_ticks;
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}
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TRACE(3,"[fm_handler] diff=%d add:%d remain:%d input", diff_ticks, (FM_SAMPLE_NUM/9)<<1, app_audio_pcmbuff_length());
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}
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#endif
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}
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uint32_t fm_pcm_more_data(uint8_t *buf, uint32_t len)
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{
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app_audio_pcmbuff_get(buf, len);
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#ifdef FM_DEBUG
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{
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static uint32_t preTicks;
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uint32_t diff_ticks = 0;
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uint32_t cur_ticks= hal_sys_timer_get();
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if (!preTicks){
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preTicks = cur_ticks;
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}else{
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diff_ticks = TICKS_TO_MS(cur_ticks - preTicks);
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preTicks = cur_ticks;
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}
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TRACE(5,"[fm_pcm_more_data] diff=%d get:%d remain:%d output isr:0x%08x cnt:%d", diff_ticks, len/2, app_audio_pcmbuff_length(), FM_DIGITAL_REG(0x40160020), FM_DIGITAL_REG(0x40160028));
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}
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#endif
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return 0;
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}
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uint32_t fm_capture_more_data(uint8_t *buf, uint32_t len)
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{
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fm_handler(0,0,0,NULL);
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return len;
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}
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void fm_radio_digit_init(void)
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{
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FM_DIGITAL_REG(0xd0350244) = (FM_DIGITAL_REG(0xd0350244) & ~0x01fff) | 0x20f; //-890k -> 0 if_shift, for 110.5292m adc
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// FM_DIGITAL_REG(0x40180e0c) = 0x34;
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//FM_DIGITAL_REG(0x4000a050) = (FM_DIGITAL_REG(0x4000a050) & ~0x18000) | 0x18000;
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#ifdef ATAN2_HARDWARE
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FM_DIGITAL_REG(0xd0330038) |= (1 << 11);
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FM_DIGITAL_REG(0xd0330038) |= (1 << 17);
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FM_DIGITAL_REG(0xd0350248) = 0x80c00000;
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// FM_DIGITAL_REG(0x40160030) = 1;
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// FM_DIGITAL_REG(0x40160000) = 0x21;
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#else
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FM_DIGITAL_REG(0xd0330038) |= (1 << 11);
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FM_DIGITAL_REG(0xd0350248) = 0x80c00000;
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// FM_DIGITAL_REG(0x40160030) = 1;
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// FM_DIGITAL_REG(0x40160000) = 1;
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#endif
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#ifdef SINGLECHANLE
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//0x4000a010 bit2 д0 <20><>channel dac
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FM_DIGITAL_REG(0x4000a010) = (1 << 5) |(1<<4);
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#else
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FM_DIGITAL_REG(0x4000a010) = (1 << 5) | (1 << 2)|(1<<4);
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#endif
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FM_DIGITAL_REG(0x4000a020) = ~0UL;
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FM_DIGITAL_REG(0x4000a02c) = 4;
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FM_DIGITAL_REG(0x4000a030) = 4;
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FM_DIGITAL_REG(0x4000a034) = (1 << 2) | (1 << 1) | (1 << 0);
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// Start DAC
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// FM_DIGITAL_REG(0x4000a010) |= (1 << 1);
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#if 0
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//52M
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FM_DIGITAL_REG(0x40000060) |= (1 << 21);
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FM_DIGITAL_REG(0x40000060) |= (1 << 24);
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FM_DIGITAL_REG(0x40000060) |= (1 << 27);
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FM_DIGITAL_REG(0x40000060) =(FM_DIGITAL_REG(0x40000060) & ~ (1 << 20));
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FM_DIGITAL_REG(0x40000060) |= (1 << 29);
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// FM_DIGITAL_REG(0x40000060) |= (1 << 27);
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FM_DIGITAL_REG(0x40000064) = (FM_DIGITAL_REG(0x40000064) & ~0xFF) | 0x7A | (1 << 10) | (1<<30);
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#endif
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FM_DIGITAL_REG(0x4000a040) = 0xc0810000;
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FM_DIGITAL_REG(0x4000a044) = 0x08040c04;
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FM_DIGITAL_REG(0x4000a048) = 0x0e01f268;
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FM_DIGITAL_REG(0x4000a04c) = 0x00005100;
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// FM_DIGITAL_REG(0x40010010) = 0;
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// FM_DIGITAL_REG(0x40010014) = 0x03a80005;
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//FM_DIGITAL_REG(0x40010018) = 0x00200019;
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FM_DIGITAL_REG(0x4000a050) = 0x24200000; //for adc_div_3_6 bypass
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FM_DIGITAL_REG(0x4000a050) = (FM_DIGITAL_REG(0x4000a050) & ~0x780) | 0x380; // for channel 1 adc volume, bit10~7
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FM_DIGITAL_REG(0x4000a050) = (FM_DIGITAL_REG(0x4000a050) & ~0x18000) | 0x18000; // for dual channel adc/dac
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#ifdef SINGLECHANLE
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//0x4000a050 bit16 д0 <20><>channel dac for codec
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FM_DIGITAL_REG(0x4000a050) =(FM_DIGITAL_REG(0x4000a050) & ~ (1 << 16));
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#endif
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FM_DIGITAL_REG(0x4000a048) = (FM_DIGITAL_REG(0x4000a048) & ~0x00000f00) | 0x40000900; //set for sdm gain
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FM_DIGITAL_REG(0x4000a044) = (FM_DIGITAL_REG(0x4000a044) & ~0x60000000) | 0x60000000; //for adc en, and dac en
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// Start DAC
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FM_DIGITAL_REG(0x4000a010) |= (1 << 1);
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// Delay 2 ms
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// for (volatile int kk = 0; kk < 1000/64; kk++);
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osDelay(2);
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//hal_sys_timer_delay(MS_TO_TICKS(2));
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// Start ADC
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// FM_DIGITAL_REG(0x4000a010) |= (1 << 0);
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#ifdef ATAN2_HARDWARE
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#ifdef FM_NEWMODE
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FM_DIGITAL_REG(0x40160030) = 1;
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FM_DIGITAL_REG(0x40160000) = 0x1;
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#else
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FM_DIGITAL_REG(0x40160030) = 1;
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FM_DIGITAL_REG(0x40160000) = 0x21;
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#endif
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#else
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//start FM
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FM_DIGITAL_REG(0x40160030) = 1;
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FM_DIGITAL_REG(0x40160000) =1;
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#endif
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}
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int fm_radio_analog_init(void)
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{
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int ret;
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/*
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// fm initial
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rfspi_wvalue( 8'h2c , 16'b0111_0000_0101_1100 ) ; // dig_vtoi_en
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rfspi_wvalue( 8'h01 , 16'b1010_1101_1111_1111 ) ; // power on fm lna
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rfspi_wvalue( 8'h02 , 16'b1000_0000_1001_0100 ) ; // reg_fm_lna_pu_mixersw
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rfspi_wvalue( 8'h1a , 16'b0101_0000_1011_0000 ) ; // reg_bt_vco_fm_buff_vctrl_dr=1
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rfspi_wvalue( 8'h18 , 16'b0000_0110_1000_0000 ) ; // power on vco
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rfspi_wvalue( 8'h19 , 16'b0110_0100_0100_0000 ) ; // reg_bt_vco_fm_buff_vctrl
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rfspi_wvalue( 8'h1d , 16'b0111_1000_1010_0100 ) ; // reg_bt_rfpll_pu_dr
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rfspi_wvalue( 8'h1c , 16'b0000_0000_1100_1000 ) ; // reg_bt_vco_fm_lo_en reg_bt_vco_fm_div_ctrl=8
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rfspi_wvalue( 8'h0a , 16'b0001_0010_0010_1111 ) ; // reg_btfm_flt_fm_en
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rfspi_wvalue( 8'h2d , 16'b0000_0111_1000_0010 ) ; // bb ldo on reg_bb_ldo_pu_vddr15a_dr
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rfspi_wvalue( 8'h07 , 16'b0000_0010_1011_1001 ) ; // reg_btfm_flt_pu_dr
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rfspi_wvalue( 8'h2a , 16'b0001_0110_1100_0000 ) ; // reg_bt_rfpll_sdm_freq_dr
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rfspi_wvalue( 8'h26 , 16'b0000_0000_0000_0000 ) ; // vco freq[31:16] ( 2400 + x )*2^25/26MHZ*N (2400+x= frf)
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rfspi_wvalue( 8'h25 , 16'b0000_0000_0000_0000 ) ; // vco freq[15:00] fm_freq = frf/(4*reg_bt_vco_fm_div_ctrl)
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rfspi_wvalue( 8'h17 , 16'b1000_0000_0000_0000 ) ; // reg_bt_vco_calen
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*/
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fm_write_rf_reg( 0x2c , 0b0111000001011100 ) ; // dig_vtoi_en
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fm_write_rf_reg( 0x01 , 0b1010110111111111 ) ; // power on fm lna
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fm_write_rf_reg( 0x02 , 0b1000000010010100 ) ; // reg_fm_lna_pu_mixersw
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fm_write_rf_reg( 0x1a , 0b0101000010110000 ) ; // reg_bt_vco_fm_buff_vctrl_dr=1
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fm_write_rf_reg( 0x18 , 0b0000011010000000 ) ; // power on vco
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fm_write_rf_reg( 0x19 , 0b0110010001000000 ) ; // reg_bt_vco_fm_buff_vctrl
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fm_write_rf_reg( 0x1d , 0b0111100010100100 ) ; // reg_bt_rfpll_pu_dr
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fm_write_rf_reg( 0x1c , 0b0000000011001000 ) ; // reg_bt_vco_fm_lo_en reg_bt_vco_fm_div_ctrl=8
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fm_write_rf_reg( 0x0a , 0b0001001000101111 ) ; // reg_btfm_flt_fm_en
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fm_write_rf_reg( 0x2d , 0b0000011110000010 ) ; // bb ldo on reg_bb_ldo_pu_vddr15a_dr
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fm_write_rf_reg( 0x07 , 0b0000001010111001 ) ; // reg_btfm_flt_pu_dr
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fm_write_rf_reg( 0x2a , 0b0001011011000000 ) ; // reg_bt_rfpll_sdm_freq_dr
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fm_write_rf_reg( 0x26 , 0b0000000000000000 ) ; // vco freq[31:16] ( 2400 + x )*2^25/26MHZ*N (2400+x= frf)
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fm_write_rf_reg( 0x25 , 0b0000000000000000 ) ; // vco freq[15:00] fm_freq = frf/(4*reg_bt_vco_fm_div_ctrl)
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fm_write_rf_reg( 0x17 , 0b1000000000000000 ) ; // reg_bt_vco_calen
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//adcҲҪ<D2B2><D2AA><EFBFBD>Ļ<EFBFBD><C4BB><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA> cmu
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//0x40000060[29] = 1 <20><><EFBFBD><EFBFBD><EFBFBD>ȶ<EFBFBD><C8B6><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѱ<EFBFBD><D1B1><EFBFBD>bit<69><74><EFBFBD><EFBFBD><EFBFBD>ˡ<EFBFBD>
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//<2F><>Ҫ<EFBFBD><D2AA><EFBFBD>õ<EFBFBD>spi<70>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ana interface:
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//0x05 = 0xFCB1 // Audio Pll
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//0x06 = 0x881C
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//0x31 = 0x0100 // audio_freq_en
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//0x37 = 0x1000 // codec_bbpll1_fm_adc_clk_en
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//0x31 = 0x0130 // codec_tx_en_ldac codec_tx_en_rdac
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ret = fm_write_rf_reg(0x05 , 0xfcb1);
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if (ret) {
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return ret;
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}
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ret = fm_write_rf_reg(0x06 , 0x881c);
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if (ret) {
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return ret;
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}
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ret = fm_write_rf_reg(0x3a , 0xe644);
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if (ret) {
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return ret;
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}
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ret = fm_write_rf_reg(0x31 , 0x0100);
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if (ret) {
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return ret;
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}
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ret = fm_write_rf_reg(0x37 , 0x1000);
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if (ret) {
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return ret;
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}
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ret = fm_write_rf_reg(0x31 , 0x01f0);
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if (ret) {
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return ret;
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}
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//delay 32ms
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osDelay(32);
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|||
|
|
|||
|
|
|||
|
ret = fm_write_rf_reg(0x31 , 0x0130);
|
|||
|
if (ret) {
|
|||
|
return ret;
|
|||
|
}
|
|||
|
|
|||
|
//[FM_RX]
|
|||
|
fm_write_rf_reg(0x01,0x91ff); //pu fm
|
|||
|
fm_write_rf_reg(0x2d,0x07fa); //ldo on
|
|||
|
fm_write_rf_reg(0x2e,0x6aaa); //tune fm filter IF
|
|||
|
fm_write_rf_reg(0x02,0xe694);
|
|||
|
fm_write_rf_reg(0x03,0xfe3a);
|
|||
|
fm_write_rf_reg(0x04,0x52a8);
|
|||
|
fm_write_rf_reg(0x07,0x02b9);
|
|||
|
fm_write_rf_reg(0x0a,0x1a2c);
|
|||
|
fm_write_rf_reg(0x0b,0x402b);
|
|||
|
fm_write_rf_reg(0x0c,0x7584);
|
|||
|
fm_write_rf_reg(0x0e,0x0000);
|
|||
|
fm_write_rf_reg(0x0f,0x2e18);
|
|||
|
fm_write_rf_reg(0x10,0x02b4);
|
|||
|
fm_write_rf_reg(0x13,0x0a48);
|
|||
|
|
|||
|
//[vco init]
|
|||
|
fm_write_rf_reg(0x18,0x077f);
|
|||
|
fm_write_rf_reg(0x19,0x3ff8);
|
|||
|
fm_write_rf_reg(0x1a,0xc090);
|
|||
|
fm_write_rf_reg(0x1b,0x0f88);
|
|||
|
fm_write_rf_reg(0x1c,0x04c6); //[3:0] 5,6,7,8 --> vco/2
|
|||
|
|
|||
|
return 0;
|
|||
|
}
|
|||
|
|
|||
|
void fm_radio_poweron(void)
|
|||
|
|
|||
|
{
|
|||
|
hal_cmu_reset_clear(HAL_CMU_MOD_BTCPU);
|
|||
|
osDelay(2000);
|
|||
|
|
|||
|
{
|
|||
|
//wakp interface
|
|||
|
unsigned short read_val;
|
|||
|
|
|||
|
fm_read_rf_reg(0x50, &read_val);
|
|||
|
}
|
|||
|
|
|||
|
pmu_fm_config(1);
|
|||
|
|
|||
|
fm_write_rf_reg(0x0c, 0x3584);
|
|||
|
if(hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2 || hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_3) ////
|
|||
|
{
|
|||
|
FM_DIGITAL_REG(0xc00003b4)=0x00060020;//turn off bt sleep
|
|||
|
}
|
|||
|
else if(hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_4)
|
|||
|
{
|
|||
|
FM_DIGITAL_REG(0xc00003b0)=0x00060020;//turn off bt sleep
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
FM_DIGITAL_REG(0xc00003ac)=0x00060020;//turn off bt sleep
|
|||
|
}
|
|||
|
FM_DIGITAL_REG(0xd0330038) = 0x00008D0D;
|
|||
|
FM_DIGITAL_REG(0xd0340020)=0x010E01C0;// open ana rxon for open adc clk
|
|||
|
//fm_write_rf_reg(0x02, 0xe694);
|
|||
|
}
|
|||
|
|
|||
|
void* fm_radio_get_ext_buff(int size)
|
|||
|
{
|
|||
|
uint8_t *pBuff = NULL;
|
|||
|
size = size+size%4;
|
|||
|
app_audio_mempool_get_buff(&pBuff, size);
|
|||
|
return (void*)pBuff;
|
|||
|
}
|
|||
|
|
|||
|
int fm_radio_player(bool on)
|
|||
|
{
|
|||
|
static struct AF_STREAM_CONFIG_T stream_cfg;
|
|||
|
static bool isRun = false;
|
|||
|
uint8_t *buff = NULL;
|
|||
|
|
|||
|
TRACE(2,"fm_radio_player work:%d op:%d", isRun, on);
|
|||
|
if (isRun==on)
|
|||
|
return 0;
|
|||
|
|
|||
|
if (on){
|
|||
|
app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_52M);
|
|||
|
app_audio_mempool_init();
|
|||
|
fm_radio_poweron();
|
|||
|
fm_radio_analog_init();
|
|||
|
fm_radio_digit_init();
|
|||
|
osDelay(200);
|
|||
|
buff = (uint8_t *)fm_radio_get_ext_buff(FM_AUDIO_BUFFER_SIZE*2);
|
|||
|
app_audio_pcmbuff_init(buff, FM_AUDIO_BUFFER_SIZE*2);
|
|||
|
fm_sample_buffer_p = (int32_t *)fm_radio_get_ext_buff(FM_SAMPLE_BUFFER_SIZE);
|
|||
|
#if FPGA==0
|
|||
|
app_overlay_select(APP_OVERLAY_FM);
|
|||
|
#endif
|
|||
|
memset(&stream_cfg, 0, sizeof(stream_cfg));
|
|||
|
stream_cfg.vol = app_bt_stream_local_volume_get();
|
|||
|
stream_cfg.handler = fm_capture_more_data;
|
|||
|
stream_cfg.data_ptr = (uint8_t *)fm_sample_buffer_p;
|
|||
|
stream_cfg.data_size = FM_SAMPLE_BUFFER_SIZE;
|
|||
|
stream_cfg.device = AUD_STREAM_USE_DPD_RX;
|
|||
|
af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, &stream_cfg);
|
|||
|
af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);
|
|||
|
|
|||
|
memset(&stream_cfg, 0, sizeof(stream_cfg));
|
|||
|
buff = (uint8_t *)fm_radio_get_ext_buff(FM_AUDIO_BUFFER_SIZE);
|
|||
|
stream_cfg.bits = AUD_BITS_16;
|
|||
|
stream_cfg.channel_num = AUD_CHANNEL_NUM_1;
|
|||
|
stream_cfg.sample_rate = AUD_SAMPRATE_48000;
|
|||
|
#if FPGA==0
|
|||
|
stream_cfg.device = AUD_STREAM_USE_INT_CODEC;
|
|||
|
#else
|
|||
|
stream_cfg.device = AUD_STREAM_USE_EXT_CODEC;
|
|||
|
#endif
|
|||
|
stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;
|
|||
|
stream_cfg.vol = app_bt_stream_local_volume_get();
|
|||
|
stream_cfg.handler = fm_pcm_more_data;
|
|||
|
stream_cfg.data_ptr = buff;
|
|||
|
stream_cfg.data_size = FM_AUDIO_BUFFER_SIZE;
|
|||
|
af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);
|
|||
|
af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);
|
|||
|
|
|||
|
}else{
|
|||
|
af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);
|
|||
|
af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);
|
|||
|
af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);
|
|||
|
af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);
|
|||
|
app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_32K);
|
|||
|
}
|
|||
|
|
|||
|
isRun=on;
|
|||
|
return 0;
|
|||
|
}
|
|||
|
|
|||
|
int fm_tune(uint32_t freqkhz)
|
|||
|
{
|
|||
|
uint32_t reg;
|
|||
|
unsigned long long tmp = 0;
|
|||
|
|
|||
|
|
|||
|
//[rfpll_cal]
|
|||
|
fm_write_rf_reg(0x21,0x3979); // ref sel 52MHz
|
|||
|
fm_write_rf_reg(0x22,0x7A22); // doubler setting
|
|||
|
fm_write_rf_reg(0x23,0x0380);
|
|||
|
fm_write_rf_reg(0x2b,0x32a0); // sdm
|
|||
|
fm_write_rf_reg(0x2a,0x12d1); // cal ini
|
|||
|
|
|||
|
//(freq(Mhz)-0.89(Mhz))*(2^28)*3/26
|
|||
|
tmp = freqkhz;
|
|||
|
reg =(((tmp-890))<<27)*3/13/1000;
|
|||
|
|
|||
|
fm_write_rf_reg(0x25, (reg&0xffff0000)>>16);
|
|||
|
fm_write_rf_reg(0x26, reg&0x0000ffff);
|
|||
|
|
|||
|
fm_write_rf_reg(0x1d,0x58e4); // pll_cal_en
|
|||
|
fm_write_rf_reg(0xf7,0x5597); // rst and enable pll_cal clk
|
|||
|
fm_write_rf_reg(0xf7,0x55d7); // rst and enable pll_cal clk
|
|||
|
fm_write_rf_reg(0x1d,0x7ae4); // pll cal start
|
|||
|
fm_write_rf_reg(0xff,0x0000); // wait 100us
|
|||
|
|
|||
|
osDelay(20);
|
|||
|
|
|||
|
|
|||
|
fm_write_rf_reg(0x1d,0x7ac4); // close pll loop
|
|||
|
|
|||
|
return 0;
|
|||
|
}
|
|||
|
|
|||
|
void fm_test_main(void)
|
|||
|
{
|
|||
|
fm_radio_player(true);
|
|||
|
osDelay(20);
|
|||
|
fm_tune(90500);
|
|||
|
}
|
|||
|
|
|||
|
#endif
|
|||
|
|