2022-08-15 04:20:27 -05:00
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#include "cmsis_nvic.h"
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#include "hal_dma.h"
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#include "hal_sensor_eng.h"
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#include "hal_timer.h"
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#include "hal_trace.h"
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2023-02-01 14:52:54 -06:00
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#include "plat_addr_map.h"
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2022-08-15 04:20:27 -05:00
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#include CHIP_SPECIFIC_HDR(reg_sensor_eng)
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#include "reg_timer.h"
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#include "string.h"
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#ifdef RTOS
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#include "cmsis_os.h"
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#endif
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#define MAX_RX_FRAME_NUM (5)
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static struct SENSOR_ENG_T *const sensor_eng[] = {
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(struct SENSOR_ENG_T *)SENSOR_ENG_BASE,
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};
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static struct DUAL_TIMER_T *const sensor_eng_timer =
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(struct DUAL_TIMER_T *)MCU_TIMER2_BASE;
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static struct HAL_DMA_DESC_T tx_dma_desc[1];
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static struct HAL_DMA_DESC_T rx_dma_desc[MAX_RX_FRAME_NUM];
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static HAL_SENSOR_ENG_HANDLER_T sensor_eng_handler;
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static uint8_t dma_rx_chan;
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static uint8_t *dma_rx_buf;
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static uint32_t dma_rx_len;
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static uint32_t prev_rx_pos;
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void hal_sensor_process_rx_buffer(void) {
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if (dma_rx_len == 0) {
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return;
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}
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uint8_t *dma_buf_active = (uint8_t *)hal_dma_get_cur_dst_addr(dma_rx_chan);
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uint32_t result_len = 0;
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uint8_t *curr_pos;
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curr_pos = dma_rx_buf + prev_rx_pos;
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// TRACE(2,"dma_buf_active:%08x curr_pos:%08x", dma_buf_active, curr_pos);
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if (dma_buf_active < curr_pos) {
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result_len = dma_rx_buf + dma_rx_len - curr_pos;
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// TRACE(2,"1:result_len:%08x, curr_pos:%08x", result_len, curr_pos);
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// DUMP8("%02x ", curr_pos, result_len);
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if (sensor_eng_handler) {
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sensor_eng_handler(HAL_SENSOR_ENGINE_ID_0, HAL_SENSOR_ENGINE_DEVICE_I2C0,
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curr_pos, result_len);
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}
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curr_pos = dma_rx_buf;
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}
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if (curr_pos < dma_buf_active) {
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result_len = dma_buf_active - curr_pos;
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// TRACE(2,"2:result_len:%08x, curr_pos:%08x", result_len, curr_pos);
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// DUMP8("%02x ", curr_pos, result_len);
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if (sensor_eng_handler) {
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sensor_eng_handler(HAL_SENSOR_ENGINE_ID_0, HAL_SENSOR_ENGINE_DEVICE_I2C0,
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curr_pos, result_len);
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}
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curr_pos = dma_buf_active;
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}
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prev_rx_pos = curr_pos - dma_rx_buf;
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}
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static void hal_sensor_eng_irq_handler(void) {
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// TRACE(2,"%s: irq=0x%08x", __func__, sensor_eng[0]->SENSOR_INTR_STS);
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sensor_eng[0]->SENSOR_INTR_CLR = SENSOR_INTR_CLEAR;
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hal_sensor_process_rx_buffer();
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}
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static void hal_sensor_eng_irq_enable(void) {
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NVIC_SetVector(SENSOR_WKUP_IRQn, (uint32_t)hal_sensor_eng_irq_handler);
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NVIC_SetPriority(SENSOR_WKUP_IRQn, IRQ_PRIORITY_HIGH);
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NVIC_ClearPendingIRQ(SENSOR_WKUP_IRQn);
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NVIC_EnableIRQ(SENSOR_WKUP_IRQn);
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}
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static void hal_sensor_eng_irq_disable(void) {
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NVIC_DisableIRQ(SENSOR_WKUP_IRQn);
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}
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static void hal_sensor_eng_timer_stop(void) {
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sensor_eng_timer->timer[0].Control = 0;
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sensor_eng_timer->timer[0].IntClr = 1;
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}
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static void hal_sensor_eng_timer_open(uint32_t ticks) {
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if (ticks > 1) {
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ticks -= 1;
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} else {
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ticks = 1;
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}
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sensor_eng_timer->timer[0].Load = ticks;
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sensor_eng_timer->timer[0].Control =
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TIMER_CTRL_MODE_PERIODIC | TIMER_CTRL_INTEN | TIMER_CTRL_PRESCALE_DIV_1 |
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TIMER_CTRL_SIZE_32_BIT;
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}
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static void hal_sensor_eng_timer_start(void) {
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sensor_eng_timer->timer[0].Control |= TIMER_CTRL_EN;
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}
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int hal_sensor_engine_open(const struct HAL_SENSOR_ENGINE_CFG_T *cfg) {
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struct HAL_DMA_CH_CFG_T rx_dma_cfg;
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enum HAL_DMA_RET_T dret;
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uint32_t i;
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uint32_t sx_sel;
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ASSERT(cfg->id == HAL_SENSOR_ENGINE_ID_0, "Bad sensor engine id: %d",
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cfg->id);
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ASSERT(cfg->device == HAL_SENSOR_ENGINE_DEVICE_I2C0,
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"Bad sensor engine device: %d", cfg->device);
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ASSERT(cfg->rx_burst_cnt <= MAX_RX_FRAME_NUM, "Bad rx_burst_cnt: %d",
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cfg->rx_burst_cnt);
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ASSERT(cfg->tx_dma_cfg, "Bad tx_dma_cfg");
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sensor_eng_handler = cfg->handler;
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dma_rx_chan = cfg->rx_dma_cfg->ch;
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dma_rx_buf = (uint8_t *)cfg->rx_dma_cfg->dst;
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dma_rx_len = cfg->rx_burst_len * cfg->rx_burst_cnt;
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prev_rx_pos = 0;
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dret =
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hal_dma_init_desc(&tx_dma_desc[0], cfg->tx_dma_cfg, &tx_dma_desc[0], 0);
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ASSERT(dret == HAL_DMA_OK, "SensorEng: Failed to init tx desc 0");
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dret = hal_gpdma_sg_start(&tx_dma_desc[0], cfg->tx_dma_cfg);
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ASSERT(dret == HAL_DMA_OK, "SensorEng: Failed to start tx dma");
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if (dma_rx_len) {
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ASSERT(cfg->rx_dma_cfg, "Bad rx_dma_cfg");
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rx_dma_cfg = *cfg->rx_dma_cfg;
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for (i = 0; i < cfg->rx_burst_cnt; i++) {
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rx_dma_cfg.dst = (uint32_t)(dma_rx_buf + cfg->rx_burst_len * i);
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if (i + 1 == cfg->rx_burst_cnt) {
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dret =
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hal_dma_init_desc(&rx_dma_desc[i], &rx_dma_cfg, &rx_dma_desc[0], 0);
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} else {
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dret = hal_dma_init_desc(&rx_dma_desc[i], &rx_dma_cfg,
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&rx_dma_desc[i + 1], 0);
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}
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ASSERT(dret == HAL_DMA_OK, "SensorEng: Failed to init rx desc %d", i);
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}
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hal_gpdma_sg_start(&rx_dma_desc[0], cfg->rx_dma_cfg);
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ASSERT(dret == HAL_DMA_OK, "SensorEng: Failed to start rx dma");
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}
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hal_cmu_clock_enable(HAL_CMU_MOD_H_SENSOR_ENG);
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hal_cmu_reset_clear(HAL_CMU_MOD_H_SENSOR_ENG);
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hal_cmu_clock_enable(HAL_CMU_MOD_O_TIMER2);
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hal_cmu_clock_enable(HAL_CMU_MOD_P_TIMER2);
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hal_cmu_reset_clear(HAL_CMU_MOD_O_TIMER2);
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hal_cmu_reset_clear(HAL_CMU_MOD_P_TIMER2);
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sensor_eng[0]->SLV0_CONFIG_REG = SLV_I2C_SPI_SEL(cfg->device) |
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SLV_SLV_DEV_ID(cfg->device_address) |
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SLV_ENABLE;
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if (dma_rx_len) {
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// RX LLI = 1
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sensor_eng[0]->GLOBAL_CFG1_REG =
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SET_BITFIELD(sensor_eng[0]->GLOBAL_CFG1_REG, NUM_OF_RX_LLI0, 1);
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}
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// TX LLI = 1
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sensor_eng[0]->GLOBAL_CFG3_REG =
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SET_BITFIELD(sensor_eng[0]->GLOBAL_CFG3_REG, NUM_OF_TX_LLI0, 1);
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if (cfg->trigger_type == HAL_SENSOR_ENGINE_TRIGGER_GPIO) {
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sensor_eng[0]->SLV0_INTR_MASK = ~(1 << cfg->trigger_gpio);
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}
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if (cfg->data_to_vad) {
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sx_sel = cfg->id;
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} else {
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sx_sel = GET_BITFIELD(sensor_eng[0]->GLOBAL_CFG0_REG, GBL_CODEC_SX_SEL);
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}
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sensor_eng[0]->GLOBAL_CFG0_REG =
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GBL_CODEC_SX_SEL(sx_sel) | GBL_SENSORHUB_EN |
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(cfg->trigger_type == HAL_SENSOR_ENGINE_TRIGGER_GPIO ? GBL_TRIGGER_TYPE
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: 0);
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if (cfg->trigger_type == HAL_SENSOR_ENGINE_TRIGGER_TIMER) {
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hal_sensor_eng_timer_open(US_TO_TICKS(cfg->period_us));
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hal_sensor_eng_timer_start();
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}
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hal_sensor_eng_irq_enable();
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return 0;
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}
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int hal_sensor_engine_close(enum HAL_SENSOR_ENGINE_ID_T id) {
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uint32_t cnt;
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hal_sensor_eng_irq_disable();
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hal_sensor_eng_timer_stop();
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sensor_eng[0]->GLOBAL_CFG0_REG &= ~GBL_SENSORHUB_EN;
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// Wait until sensor engine becomes idle
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cnt = 0;
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while ((sensor_eng[0]->SENSOR_STATUS & SENSOR_ENG_FSM_MASK) && cnt < 10) {
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osDelay(1);
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cnt++;
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}
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if (sensor_eng[0]->SENSOR_STATUS & SENSOR_ENG_FSM_MASK) {
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ASSERT(false, "%s: Sensor engine cannot become idle: 0x%08X", __func__,
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sensor_eng[0]->SENSOR_STATUS);
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}
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sensor_eng[0]->SLV0_INTR_MASK = ~0UL;
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dma_rx_len = 0;
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hal_cmu_reset_set(HAL_CMU_MOD_P_TIMER2);
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hal_cmu_reset_set(HAL_CMU_MOD_O_TIMER2);
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hal_cmu_clock_disable(HAL_CMU_MOD_P_TIMER2);
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hal_cmu_clock_disable(HAL_CMU_MOD_O_TIMER2);
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hal_cmu_reset_set(HAL_CMU_MOD_H_SENSOR_ENG);
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hal_cmu_clock_disable(HAL_CMU_MOD_H_SENSOR_ENG);
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return 0;
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}
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#if 0
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#include "hal_i2c.h"
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#define READ_BUF_BURST_CNT 5
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#define TRIGGER_TIMER_US 500000
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#define LOCK_INTR_CNT 3
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#define TRIGGER_GPIO_PIN HAL_GPIO_PIN_P0_0
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static void hal_sensor_eng_external_input_pin_irqhandler(enum HAL_GPIO_PIN_T pin)
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{
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bool gpio_lvl = 0;
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gpio_lvl = hal_gpio_pin_get_val(pin);
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TRACE(2,"hal_sensor_eng_external_irqhandler io=%d val=%d", pin, gpio_lvl);
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}
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static void sensor_timer_test_handler(enum HAL_I2C_ID_T id, const uint8_t *buf, uint32_t len)
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{
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TRACE(7,"%s: id=%d len=%u %02X-%02X-%02X-%02x", __FUNCTION__, id, len, buf[0], buf[1], buf[2], buf[3]);
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}
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static void sensor_gpio_test_handler(enum HAL_I2C_ID_T id, const uint8_t *buf, uint32_t len)
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{
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TRACE(7,"%s: id=%d len=%u %02X-%02X-%02X-%02x", __FUNCTION__, id, len, buf[0], buf[1], buf[2], buf[3]);
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}
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static int sensor_eng_test(enum HAL_SENSOR_ENGINE_TRIGGER_T trigger_type)
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{
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static uint8_t write_buf[3];
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static uint8_t read_buf[READ_BUF_BURST_CNT][sizeof(write_buf) * 2];
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int ret;
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struct HAL_I2C_CONFIG_T cfg;
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struct HAL_I2C_SENSOR_ENGINE_CONFIG_T se_cfg;
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enum HAL_I2C_ID_T id;
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uint32_t i;
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id = HAL_I2C_ID_0;
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for (i = 0; i < sizeof(write_buf); i++) {
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write_buf[i] = i;
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}
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memset(&cfg, 0, sizeof(cfg));
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cfg.mode = HAL_I2C_API_MODE_SENSOR_ENGINE;
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cfg.as_master = 1;
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cfg.use_dma = 1;
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cfg.use_sync = 1;
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cfg.speed = 100000;
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ret = hal_i2c_open(id, &cfg);
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if (ret) {
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TRACE(2,"%s: i2c open failed %d", __func__, ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
memset(&se_cfg, 0, sizeof(se_cfg));
|
|
|
|
se_cfg.id = HAL_SENSOR_ENGINE_ID_0;
|
|
|
|
se_cfg.trigger_type = trigger_type;
|
|
|
|
if (trigger_type == HAL_SENSOR_ENGINE_TRIGGER_TIMER) {
|
|
|
|
se_cfg.period_us = TRIGGER_TIMER_US;
|
|
|
|
se_cfg.handler = sensor_timer_test_handler;
|
|
|
|
} else {
|
|
|
|
se_cfg.trigger_gpio = TRIGGER_GPIO_PIN;
|
|
|
|
se_cfg.handler = sensor_gpio_test_handler;
|
|
|
|
}
|
|
|
|
se_cfg.target_addr = 0x17;
|
|
|
|
se_cfg.write_buf = &write_buf[0];
|
|
|
|
se_cfg.write_txn_len = 1;
|
|
|
|
se_cfg.read_buf = &read_buf[0][0];
|
|
|
|
se_cfg.read_txn_len = 2;
|
|
|
|
se_cfg.txn_cnt = sizeof(write_buf);
|
|
|
|
se_cfg.read_burst_cnt = READ_BUF_BURST_CNT;
|
|
|
|
|
|
|
|
hal_i2c_sensor_engine_start(id, &se_cfg);
|
|
|
|
|
|
|
|
uint32_t lock = int_lock();
|
|
|
|
while (1) {
|
|
|
|
hal_sys_timer_delay(US_TO_TICKS(TRIGGER_TIMER_US) * LOCK_INTR_CNT);
|
|
|
|
TRACE_IMM(2,"%s: delay %u ms", __func__, (TRIGGER_TIMER_US / 1000 * LOCK_INTR_CNT));
|
|
|
|
hal_sensor_process_rx_buffer();
|
|
|
|
}
|
|
|
|
int_unlock(lock);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int hal_sensor_eng_periodic_timer_test(void)
|
|
|
|
{
|
|
|
|
sensor_eng_test(HAL_SENSOR_ENGINE_TRIGGER_TIMER);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int hal_sensor_eng_external_input_test(void)
|
|
|
|
{
|
|
|
|
static const struct HAL_IOMUX_PIN_FUNCTION_MAP ext_pin[] = {
|
|
|
|
{TRIGGER_GPIO_PIN, HAL_IOMUX_FUNC_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE},
|
|
|
|
};
|
|
|
|
struct HAL_GPIO_IRQ_CFG_T gpiocfg;
|
|
|
|
|
|
|
|
sensor_eng_test(HAL_SENSOR_ENGINE_TRIGGER_GPIO);
|
|
|
|
|
|
|
|
hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP *)ext_pin, sizeof(ext_pin)/sizeof(struct HAL_IOMUX_PIN_FUNCTION_MAP));
|
|
|
|
hal_gpio_pin_set_dir(TRIGGER_GPIO_PIN, HAL_GPIO_DIR_IN, 1);
|
|
|
|
|
|
|
|
gpiocfg.irq_enable = true;
|
|
|
|
gpiocfg.irq_debounce = false;
|
|
|
|
gpiocfg.irq_polarity = HAL_GPIO_IRQ_POLARITY_HIGH_RISING;
|
|
|
|
gpiocfg.irq_handler = hal_sensor_eng_external_input_pin_irqhandler;
|
|
|
|
gpiocfg.irq_type = HAL_GPIO_IRQ_TYPE_EDGE_SENSITIVE;
|
|
|
|
|
|
|
|
hal_gpio_setup_irq(TRIGGER_GPIO_PIN, &gpiocfg);
|
|
|
|
|
|
|
|
TRACE(5,"SLV0:%08x CFG1:0x%08x CFG3:0x%08x CFG0:0x%08x INTR_MASK:0x%08x",
|
|
|
|
sensor_eng[0]->SLV0_CONFIG_REG,
|
|
|
|
sensor_eng[0]->GLOBAL_CFG1_REG,
|
|
|
|
sensor_eng[0]->GLOBAL_CFG3_REG,
|
|
|
|
sensor_eng[0]->GLOBAL_CFG0_REG,
|
|
|
|
sensor_eng[0]->SLV0_INTR_MASK);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|