2022-08-15 04:20:27 -05:00
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#ifndef RWIP_CONFIG_H_
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#define RWIP_CONFIG_H_
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/**
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****************************************************************************************
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* @addtogroup ROOT
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* @{
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*
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* Information about RW SW IP options and flags
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*
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* BT_DUAL_MODE BT/BLE Dual Mode
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* BT_STD_MODE BT Only
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* BLE_STD_MODE BLE Only
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*
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* BT_EMB_PRESENT BT controller exists
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* BLE_EMB_PRESENT BLE controller exists
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* BLE_HOST_PRESENT BLE host exists
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*
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* @name RW Stack Configuration
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* @{
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****************************************************************************************
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*/
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/*
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* DEFINES
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****************************************************************************************
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*/
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#include "besble_debug.h"
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2023-02-02 00:22:58 -06:00
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#include "cmsis.h"
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#include "os_api.h"
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#include "rwapp_config.h" // Audio Mode 0 configuration
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2022-08-15 04:20:27 -05:00
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2023-02-02 00:22:58 -06:00
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// #if (__IAG_BLE_INCLUDE__ == XA_ENABLED)
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2022-08-15 04:20:27 -05:00
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#ifdef __IAG_BLE_INCLUDE__
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#define _BLE_NVDS_
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#define CFG_BLE
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#define CFG_HOST
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#define CFG_APP
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#if defined(BISTO_ENABLED)
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#ifndef CFG_APP_SEC
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#define CFG_APP_SEC
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#endif
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#define CFG_SEC_CON
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#endif
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#endif
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2023-02-02 00:22:58 -06:00
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#define GLOBAL_INT_DISABLE() \
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do { \
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uint32_t lock = int_lock();
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#define GLOBAL_INT_RESTORE() \
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int_unlock(lock); \
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} \
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while (0) \
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;
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2022-08-15 04:20:27 -05:00
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/******************************************************************************************/
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2023-02-02 00:22:58 -06:00
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/* -------------------------- GENERAL SETUP
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* --------------------------------------*/
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2022-08-15 04:20:27 -05:00
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/******************************************************************************************/
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/// Flag indicating if stack is compiled in dual or single mode
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#if defined(CFG_BT)
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2023-02-02 00:22:58 -06:00
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#define BLE_STD_MODE 0
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#if defined(CFG_BLE)
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#define BT_DUAL_MODE 1
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#define BT_STD_MODE 0
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#else // CFG_BLE
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#define BT_DUAL_MODE 0
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#define BT_STD_MODE 1
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#endif // CFG_BLE
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#elif defined(CFG_BLE)
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#define BT_DUAL_MODE 0
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#define BT_STD_MODE 0
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#define BLE_STD_MODE 1
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#endif // CFG_BT
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/******************************************************************************************/
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/* ------------------------- STACK PARTITIONING
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* -----------------------------------*/
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2022-08-15 04:20:27 -05:00
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/******************************************************************************************/
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#if (BT_DUAL_MODE)
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#define BT_EMB_PRESENT 1
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#define BLE_EMB_PRESENT 1
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#define HCI_PRESENT 1
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#define BLE_HOST_PRESENT 0
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#define BLE_APP_PRESENT 0
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#elif (BT_STD_MODE)
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#define BT_EMB_PRESENT 1
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#define BLE_EMB_PRESENT 0
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#define HCI_PRESENT 1
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#define BLE_HOST_PRESENT 0
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#define BLE_APP_PRESENT 0
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#elif (BLE_STD_MODE)
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#define BT_EMB_PRESENT 0
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#define HCI_PRESENT 1
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#if defined(CFG_EMB)
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#define BLE_EMB_PRESENT 1
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#else
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#define BLE_EMB_PRESENT 0
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#endif // CFG_EMB
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#if defined(CFG_HOST)
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#define BLE_HOST_PRESENT 1
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#else
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#define BLE_HOST_PRESENT 0
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#endif // CFG_HOST
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#if defined(CFG_APP)
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#define BLE_APP_PRESENT 1
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#else
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#define BLE_APP_PRESENT 0
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#endif // CFG_APP
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2022-08-15 04:20:27 -05:00
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#endif // BT_DUAL_MODE / BT_STD_MODE / BLE_STD_MODE
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#define EA_PRESENT (BT_EMB_PRESENT || BLE_EMB_PRESENT)
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/******************************************************************************************/
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2023-02-02 00:22:58 -06:00
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/* ------------------------- INTERFACES DEFINITIONS
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* -------------------------------*/
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2022-08-15 04:20:27 -05:00
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/******************************************************************************************/
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#define CFG_AHITL
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#define CFG_HCITL
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/// Application Host Interface
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#if defined(CFG_AHITL)
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#define AHI_TL_SUPPORT 1
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#else // defined(CFG_AHITL)
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#define AHI_TL_SUPPORT 0
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#endif // defined(CFG_AHITL)
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/// Host Controller Interface Support (defines if HCI parser is present or not)
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#if defined(CFG_HCITL)
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#define HCI_TL_SUPPORT 1
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#else // defined(CFG_HCITL)
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#define HCI_TL_SUPPORT 0
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#endif // defined(CFG_HCITL)
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#if BLE_HOST_PRESENT
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#if BLE_EMB_PRESENT
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#define H4TL_SUPPORT (AHI_TL_SUPPORT)
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#else // !BLE_EMB_PRESENT
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#define H4TL_SUPPORT 0 //((AHI_TL_SUPPORT) + (HCI_TL_SUPPORT))
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#endif // BLE_EMB_PRESENT
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#else // !BLE_HOST_PRESENT
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#define H4TL_SUPPORT (HCI_TL_SUPPORT)
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#endif // BLE_HOST_PRESENT
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/// TCI LMP trace support
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#define TCI_LMP_ENABLED 0
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/******************************************************************************************/
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2023-02-02 00:22:58 -06:00
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/* -------------------------- BLE COMMON DEFINITIONS
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* ------------------------------*/
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/******************************************************************************************/
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/// Kernel Heap memory sized reserved for allocate dynamically connection
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/// environment
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#define KE_HEAP_MEM_RESERVED (4)
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#define CFG_ALLROLES
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#if defined(CFG_BLE)
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/// Application role definitions
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#define BLE_BROADCASTER \
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(defined(CFG_BROADCASTER) || defined(CFG_PERIPHERAL) || defined(CFG_ALLROLES))
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#define BLE_OBSERVER \
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(defined(CFG_OBSERVER) || defined(CFG_CENTRAL) || defined(CFG_ALLROLES))
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#define BLE_PERIPHERAL (defined(CFG_PERIPHERAL) || defined(CFG_ALLROLES))
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#define BLE_CENTRAL (defined(CFG_CENTRAL) || defined(CFG_ALLROLES))
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#if (!BLE_BROADCASTER) && (!BLE_OBSERVER) && (!BLE_PERIPHERAL) && (!BLE_CENTRAL)
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#error "No application role defined"
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#endif /* #if (!BLE_BROADCASTER) && (!BLE_OBSERVER) && (!BLE_PERIPHERAL) && \
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(!BLE_CENTRAL) */
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/// Maximum number of simultaneous BLE activities (scan, connection,
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/// advertising, initiating)
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#define BLE_ACTIVITY_MAX (BLE_CONNECTION_MAX)
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/// Maximum number of audio connections
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#if defined(CFG_AUDIO)
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#if (BLE_CENTRAL || BLE_PERIPHERAL)
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#define BLE_AUDIO (1)
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#define BLE_AUDIO_CONNECT_MAX (CFG_AUDIO_CON)
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#else
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#define BLE_AUDIO (0)
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#endif /*(BLE_CENTRAL || BLE_PERIPHERAL)*/
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#else
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#define BLE_AUDIO (0)
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#endif /*defined(CFG_AUDIO)*/
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/// Max advertising reports before sending the info to the host
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#define BLE_ADV_REPORTS_MAX 1
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/// Define Number of AUDIO TX/RX buffers per voice channel
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#if (BLE_AUDIO)
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2023-02-02 00:22:58 -06:00
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#if defined(CFG_AUDIO_AOAHI)
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// 3 buffers per connection using audio over AHI TL
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#define BLE_NB_INPUT_BUFF_PER_VC (3)
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#define BLE_NB_OUTPUT_BUFF_PER_VC (3)
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#else // defined(CFG_AUDIO_AOAHI)
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// 2 buffers if a codec is available
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#define BLE_NB_INPUT_BUFF_PER_VC (2)
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#define BLE_NB_OUTPUT_BUFF_PER_VC (2)
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#endif // defined(CFG_AUDIO_AOAHI)
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// add one more buffer for fake reception and fake transmit
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#define BLE_TX_AUDIO_BUFFER_CNT \
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((BLE_AUDIO_CONNECT_MAX * BLE_NB_INPUT_BUFF_PER_VC) + 1)
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#define BLE_RX_AUDIO_BUFFER_CNT \
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((BLE_AUDIO_CONNECT_MAX * BLE_NB_OUTPUT_BUFF_PER_VC) + 1)
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#endif // (BLE_AUDIO)
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#define CFG_DEPRECATED_API
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/// Support of Legacy Air Operations
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#if defined(CFG_DEPRECATED_API)
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#define BLE_DEPRECATED_API (1)
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#else // defined(CFG_DEPRECATED_API)
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#define BLE_DEPRECATED_API (0)
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#endif // defined(CFG_DEPRECATED_API)
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#endif // defined(CFG_BLE)
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/******************************************************************************************/
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/* -------------------------- DISPLAY SETUP
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* -------------------------------------*/
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/******************************************************************************************/
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/// Display controller enable/disable
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#if defined(CFG_DISPLAY)
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#define DISPLAY_SUPPORT 1
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#else
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#define DISPLAY_SUPPORT 0
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#endif // CFG_DISPLAY
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/******************************************************************************************/
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2023-02-02 00:22:58 -06:00
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/* -------------------------- RTC SETUP
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* -------------------------------------*/
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2022-08-15 04:20:27 -05:00
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/******************************************************************************************/
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/// RTC enable/disable
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#if defined(CFG_RTC)
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#define RTC_SUPPORT 1
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#else
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#define RTC_SUPPORT 0
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#endif // CFG_DISPLAY
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/******************************************************************************************/
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2023-02-02 00:22:58 -06:00
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/* -------------------------- PS2 SETUP
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* -------------------------------------*/
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/******************************************************************************************/
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/// PS2 enable/disable
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#if defined(CFG_PS2)
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#define PS2_SUPPORT 1
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#else
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#define PS2_SUPPORT 0
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#endif // CFG_PS2
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/******************************************************************************************/
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/* -------------------------- TRACER SETUP
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* -------------------------------------*/
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/******************************************************************************************/
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/// tracer enable/disable
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#if defined(CFG_TRC_EN)
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#define TRACER_PRESENT 1
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#include "dbg_trc_config.h"
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#else
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#define TRACER_PRESENT 0
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#endif // CFG_TRC_EN
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/******************************************************************************************/
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/* ------------------------- DEEP SLEEP SETUP
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* -------------------------------------*/
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/******************************************************************************************/
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/// Use 32K Hz Clock if set to 1 else 32,768k is used
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#define HZ32000 0
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/// Time to wake-up Radio Module (in us)
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#define SLEEP_RM_WAKEUP_DELAY 625
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/// Time for stabilization of the high frequency oscillator following a
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/// sleep-timer expiry (in us)
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#define SLEEP_OSC_NORMAL_WAKEUP_DELAY 5000
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/// Time for stabilization of the high frequency oscillator following an
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/// external wake-up request (in us)
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#define SLEEP_OSC_EXT_WAKEUP_DELAY 5000
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/******************************************************************************************/
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/* -------------------------- RADIO SETUP
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* ----------------------------------------*/
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/******************************************************************************************/
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/// Power control features
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#define RF_TXPWR 1
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/// Class of device
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#define RF_CLASS1 0
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/******************************************************************************************/
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/* ------------------------- SUPPORTED RADIO PHY
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* ------------------------------------*/
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/******************************************************************************************/
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#if defined(CFG_RF_ATLAS)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define BLE_PHY_1MBPS_SUPPORT 1
|
|
|
|
#define BLE_PHY_2MBPS_SUPPORT 1
|
|
|
|
#define BLE_PHY_CODED_SUPPORT 0
|
2022-08-15 04:20:27 -05:00
|
|
|
#else
|
2023-02-02 00:22:58 -06:00
|
|
|
#define BLE_PHY_1MBPS_SUPPORT 1
|
|
|
|
#define BLE_PHY_2MBPS_SUPPORT 1
|
|
|
|
#define BLE_PHY_CODED_SUPPORT 1
|
2022-08-15 04:20:27 -05:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/******************************************************************************************/
|
2023-02-02 00:22:58 -06:00
|
|
|
/* ------------------------- COEXISTENCE SETUP
|
|
|
|
* ------------------------------------*/
|
2022-08-15 04:20:27 -05:00
|
|
|
/******************************************************************************************/
|
|
|
|
|
|
|
|
/// WLAN Coexistence
|
|
|
|
#if defined(CFG_WLAN_COEX)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RW_WLAN_COEX 1
|
|
|
|
#define RW_WLAN_COEX_TEST (defined(CFG_WLAN_COEX_TEST))
|
2022-08-15 04:20:27 -05:00
|
|
|
#else
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RW_WLAN_COEX 0
|
|
|
|
#define RW_WLAN_COEX_TEST 0
|
2022-08-15 04:20:27 -05:00
|
|
|
#endif // defined(CFG_WLAN_COEX)
|
|
|
|
|
|
|
|
/// MWS Coexistence
|
|
|
|
#if defined(CFG_MWS_COEX)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RW_MWS_COEX 1
|
|
|
|
#define RW_MWS_COEX_TEST (defined(CFG_MWS_COEX_TEST))
|
2022-08-15 04:20:27 -05:00
|
|
|
#else
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RW_MWS_COEX 0
|
|
|
|
#define RW_MWS_COEX_TEST 0
|
2022-08-15 04:20:27 -05:00
|
|
|
#endif // defined(CFG_MWS_COEX)
|
|
|
|
|
|
|
|
/******************************************************************************************/
|
2023-02-02 00:22:58 -06:00
|
|
|
/* ------------------------- DM ARBITRATION SETUP
|
|
|
|
* ---------------------------------*/
|
2022-08-15 04:20:27 -05:00
|
|
|
/******************************************************************************************/
|
|
|
|
|
|
|
|
#if BT_DUAL_MODE
|
|
|
|
/**
|
|
|
|
* Dual mode arbitration margin (in us)
|
|
|
|
*
|
2023-02-02 00:22:58 -06:00
|
|
|
* BREDRMARGIN/BLEMARGIN corresponding to a timing value that allows the RF to
|
|
|
|
* power-down properly before any other activity. This is radio dependent.
|
2022-08-15 04:20:27 -05:00
|
|
|
*/
|
2023-02-02 00:22:58 -06:00
|
|
|
#define DM_ARB_MARGIN 40
|
|
|
|
#endif // BT_DUAL_MODE
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
/******************************************************************************************/
|
2023-02-02 00:22:58 -06:00
|
|
|
/* -------------------- SECURE CONNECTIONS SETUP
|
|
|
|
* --------------------------------------*/
|
2022-08-15 04:20:27 -05:00
|
|
|
/******************************************************************************************/
|
2023-02-02 00:22:58 -06:00
|
|
|
#define SECURE_CONNECTIONS (1)
|
2022-08-15 04:20:27 -05:00
|
|
|
#if defined(CFG_ECC_16_BITS_ALGO)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define ECC_MULT_ALGO_TYPE (16)
|
2022-08-15 04:20:27 -05:00
|
|
|
#else // !defined(CFG_ECC_16_BITS_ALGO)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define ECC_MULT_ALGO_TYPE (32)
|
2022-08-15 04:20:27 -05:00
|
|
|
#endif // defined(CFG_ECC_16_BITS_ALGO)
|
|
|
|
#if defined(CFG_CRYPTO_UT)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define CRYPTO_UT (1)
|
|
|
|
#else // defined(CFG_CRYPTO_UT)
|
|
|
|
#define CRYPTO_UT (0)
|
|
|
|
#endif // defined(CFG_CRYPTO_UT)
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
/******************************************************************************************/
|
2023-02-02 00:22:58 -06:00
|
|
|
/* -------------------------- DEBUG SETUP
|
|
|
|
* ----------------------------------------*/
|
2022-08-15 04:20:27 -05:00
|
|
|
/******************************************************************************************/
|
|
|
|
|
|
|
|
/// Flag indicating if debug mode is activated or not
|
|
|
|
#if defined(CFG_DBG)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RW_DEBUG ((BLE_EMB_PRESENT) || (BT_EMB_PRESENT) || (BLE_HOST_PRESENT))
|
2022-08-15 04:20:27 -05:00
|
|
|
#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RW_SWDIAG 1
|
2022-08-15 04:20:27 -05:00
|
|
|
#else
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RW_SWDIAG 0
|
2022-08-15 04:20:27 -05:00
|
|
|
#endif
|
2023-02-02 00:22:58 -06:00
|
|
|
#define KE_PROFILING 1
|
2022-08-15 04:20:27 -05:00
|
|
|
#else
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RW_DEBUG 0
|
|
|
|
#define RW_SWDIAG 0
|
|
|
|
#define KE_PROFILING 0
|
2022-08-15 04:20:27 -05:00
|
|
|
#endif /* CFG_DBG */
|
|
|
|
|
|
|
|
/// Flag indicating if Read/Write memory commands are supported or not
|
|
|
|
#if defined(CFG_DBG_MEM)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RW_DEBUG_MEM 1
|
|
|
|
#else // CFG_DBG_MEM
|
|
|
|
#define RW_DEBUG_MEM 0
|
|
|
|
#endif // CFG_DBG_MEM
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
/// Flag indicating if Flash debug commands are supported or not
|
|
|
|
#if defined(CFG_DBG_FLASH)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RW_DEBUG_FLASH 1
|
|
|
|
#else // CFG_DBG_FLASH
|
|
|
|
#define RW_DEBUG_FLASH 0
|
|
|
|
#endif // CFG_DBG_FLASH
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
/// Flag indicating if CPU stack profiling commands are supported or not
|
|
|
|
#if defined(CFG_DBG_STACK_PROF)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RW_DEBUG_STACK_PROF 1
|
2022-08-15 04:20:27 -05:00
|
|
|
#else
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RW_DEBUG_STACK_PROF 0
|
2022-08-15 04:20:27 -05:00
|
|
|
#endif // defined (CFG_DBG_STACK_PROF)
|
|
|
|
|
|
|
|
/// Modem back to back setup
|
2023-02-02 00:22:58 -06:00
|
|
|
#define MODEM2MODEM 0
|
2022-08-15 04:20:27 -05:00
|
|
|
/// Special clock testing
|
2023-02-02 00:22:58 -06:00
|
|
|
#define CLK_WRAPPING 0
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
/******************************************************************************************/
|
2023-02-02 00:22:58 -06:00
|
|
|
/* -------------------------- NVDS SETUP
|
|
|
|
* --------------------------------------*/
|
2022-08-15 04:20:27 -05:00
|
|
|
/******************************************************************************************/
|
|
|
|
|
|
|
|
/// Flag indicating if NVDS feature is supported or not
|
|
|
|
#if defined(CFG_NVDS)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define NVDS_SUPPORT 1
|
|
|
|
#else // CFG_DBG_NVDS
|
|
|
|
#define NVDS_SUPPORT 0
|
|
|
|
#endif // CFG_DBG_NVDS
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
/******************************************************************************************/
|
2023-02-02 00:22:58 -06:00
|
|
|
/* -------------------------- MISC SETUP
|
|
|
|
* --------------------------------------*/
|
2022-08-15 04:20:27 -05:00
|
|
|
/******************************************************************************************/
|
|
|
|
/// Manufacturer: RivieraWaves SAS
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RW_COMP_ID 0x0060
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
/// Bluetooth technologies version
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RW_BT40_VERSION (6)
|
|
|
|
#define RW_BT41_VERSION (7)
|
|
|
|
#define RW_BT42_VERSION (8)
|
|
|
|
#define RW_BT50_VERSION (9)
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
/******************************************************************************************/
|
2023-02-02 00:22:58 -06:00
|
|
|
/* ------------------------- BT / BLE / BLE HL CONFIG
|
|
|
|
* -------------------------------*/
|
2022-08-15 04:20:27 -05:00
|
|
|
/******************************************************************************************/
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
#if (BT_EMB_PRESENT)
|
2023-02-02 00:22:58 -06:00
|
|
|
#include "rwbt_config.h" // bt stack configuration
|
|
|
|
#endif // BT_EMB_PRESENT
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
#if (BLE_EMB_PRESENT)
|
2023-02-02 00:22:58 -06:00
|
|
|
#include "rwble_config.h" // ble stack configuration
|
|
|
|
#endif // BLE_EMB_PRESENT
|
2022-08-15 04:20:27 -05:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#if (BLE_HOST_PRESENT)
|
2023-02-02 00:22:58 -06:00
|
|
|
#include "rwble_hl_config.h" // ble Host stack configuration
|
|
|
|
#endif // BLE_HOST_PRESENT
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
#if defined(CFG_AUDIO_AM0)
|
2023-02-02 00:22:58 -06:00
|
|
|
#include "rwam0_config.h" // Audio Mode 0 configuration
|
|
|
|
#endif // defined(CFG_AUDIO_AM0)
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
#if defined(CFG_APP)
|
2023-02-02 00:22:58 -06:00
|
|
|
// #include "rwapp_config.h" // Audio Mode 0 configuration
|
2022-08-15 04:20:27 -05:00
|
|
|
#endif // defined(CFG_APP)
|
|
|
|
|
2023-02-02 00:22:58 -06:00
|
|
|
#define BLE_INVALID_CONNECTION_INDEX 0xFF
|
2022-08-15 04:20:27 -05:00
|
|
|
|
2023-02-02 00:22:58 -06:00
|
|
|
#define SV_HIGH_SPEED_BLE_CONNECTION_INTERVAL_MIN_IN_MS 80
|
|
|
|
#define SV_HIGH_SPEED_BLE_CONNECTION_INTERVAL_MAX_IN_MS 400
|
|
|
|
#define SV_HIGH_SPEED_BLE_CONNECTION_SUPERVISOR_TIMEOUT_IN_MS 20000
|
2022-08-15 04:20:27 -05:00
|
|
|
|
2023-02-02 00:22:58 -06:00
|
|
|
#define SV_LOW_SPEED_BLE_CONNECTION_INTERVAL_MIN_IN_MS 400
|
|
|
|
#define SV_LOW_SPEED_BLE_CONNECTION_INTERVAL_MAX_IN_MS 1000
|
|
|
|
#define SV_LOW_SPEED_BLE_CONNECTION_SUPERVISOR_TIMEOUT_IN_MS 20000
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
/******************************************************************************************/
|
2023-02-02 00:22:58 -06:00
|
|
|
/* ------------------------- KERNEL SETUP
|
|
|
|
* -------------------------------------*/
|
2022-08-15 04:20:27 -05:00
|
|
|
/******************************************************************************************/
|
|
|
|
|
|
|
|
/// Event types definition
|
2023-02-02 00:22:58 -06:00
|
|
|
enum KE_EVENT_TYPE {
|
|
|
|
KE_EVENT_KE_MESSAGE,
|
|
|
|
KE_EVENT_KE_TIMER,
|
|
|
|
#if (TRACER_PRESENT)
|
|
|
|
KE_EVENT_TRC,
|
|
|
|
#endif /*(TRACER_PRESENT)*/
|
|
|
|
|
|
|
|
#if (AHI_TL_SUPPORT)
|
|
|
|
KE_EVENT_AHI_TX_DONE,
|
|
|
|
#endif //(AHI_TL_SUPPORT)
|
|
|
|
|
|
|
|
#if (BLE_HOST_PRESENT)
|
|
|
|
#if (BLE_L2CC)
|
|
|
|
KE_EVENT_L2CAP_TX,
|
|
|
|
#endif //(BLE_L2CC)
|
|
|
|
#endif // (BLE_HOST_PRESENT)
|
|
|
|
|
|
|
|
KE_EVENT_MAX,
|
2022-08-15 04:20:27 -05:00
|
|
|
};
|
|
|
|
|
|
|
|
/// Tasks types definition
|
2023-02-02 00:22:58 -06:00
|
|
|
enum KE_TASK_TYPE {
|
2022-08-15 04:20:27 -05:00
|
|
|
#if (BLE_APP_PRESENT)
|
2023-02-02 00:22:58 -06:00
|
|
|
TASK_APP,
|
2022-08-15 04:20:27 -05:00
|
|
|
#endif // (BLE_APP_PRESENT)
|
|
|
|
|
|
|
|
#if (BLE_HOST_PRESENT)
|
2023-02-02 00:22:58 -06:00
|
|
|
TASK_L2CC, // L2CAP Controller Task
|
|
|
|
TASK_GATTM, // Generic Attribute Profile Manager Task
|
|
|
|
TASK_GATTC, // Generic Attribute Profile Controller Task
|
|
|
|
TASK_GAPM, // Generic Access Profile Manager, 4
|
|
|
|
TASK_GAPC, // Generic Access Profile Controller
|
|
|
|
|
|
|
|
// allocate a certain number of profiles task
|
|
|
|
TASK_PRF_MAX = (TASK_GAPC + BLE_NB_PROFILES),
|
|
|
|
|
|
|
|
#ifdef BLE_AUDIO_AM0_TASK
|
|
|
|
TASK_AM0, // BLE Audio Mode 0 Task
|
|
|
|
#endif // BLE_AUDIO_AM0_TASK
|
|
|
|
#endif // (BLE_HOST_PRESENT)
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
#if (AHI_TL_SUPPORT)
|
2023-02-02 00:22:58 -06:00
|
|
|
TASK_AHI,
|
2022-08-15 04:20:27 -05:00
|
|
|
#endif // (AHI_TL_SUPPORT)
|
|
|
|
|
2023-02-02 00:22:58 -06:00
|
|
|
/// Maximum number of tasks
|
|
|
|
TASK_MAX = 0xFE,
|
2022-08-15 04:20:27 -05:00
|
|
|
|
2023-02-02 00:22:58 -06:00
|
|
|
TASK_NONE = 0xFF,
|
2022-08-15 04:20:27 -05:00
|
|
|
};
|
|
|
|
|
|
|
|
/// Kernel memory heaps types.
|
2023-02-02 00:22:58 -06:00
|
|
|
enum {
|
|
|
|
/// Memory allocated for environment variables
|
|
|
|
KE_MEM_ENV,
|
|
|
|
#if (BLE_HOST_PRESENT)
|
|
|
|
/// Memory allocated for Attribute database
|
|
|
|
KE_MEM_ATT_DB,
|
|
|
|
#endif // (BLE_HOST_PRESENT)
|
|
|
|
/// Memory allocated for kernel messages
|
|
|
|
KE_MEM_KE_MSG,
|
|
|
|
/// Non Retention memory block
|
|
|
|
KE_MEM_NON_RETENTION,
|
|
|
|
KE_MEM_BLOCK_MAX,
|
2022-08-15 04:20:27 -05:00
|
|
|
};
|
|
|
|
|
|
|
|
#if (BT_EMB_PRESENT)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define BT_HEAP_MSG_SIZE_ BT_HEAP_MSG_SIZE
|
|
|
|
#define BT_HEAP_ENV_SIZE_ BT_HEAP_ENV_SIZE
|
2022-08-15 04:20:27 -05:00
|
|
|
#else
|
2023-02-02 00:22:58 -06:00
|
|
|
#define BT_HEAP_MSG_SIZE_ 0
|
|
|
|
#define BT_HEAP_ENV_SIZE_ 0
|
|
|
|
#endif // BT_EMB_PRESENT
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
#if (BLE_EMB_PRESENT)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define BLE_HEAP_MSG_SIZE_ BLE_HEAP_MSG_SIZE
|
|
|
|
#define BLE_HEAP_ENV_SIZE_ BLE_HEAP_ENV_SIZE
|
2022-08-15 04:20:27 -05:00
|
|
|
#else
|
2023-02-02 00:22:58 -06:00
|
|
|
#define BLE_HEAP_MSG_SIZE_ 0
|
|
|
|
#define BLE_HEAP_ENV_SIZE_ 0
|
|
|
|
#endif // BLE_EMB_PRESENT
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
#if (BLE_HOST_PRESENT)
|
2023-02-02 00:22:58 -06:00
|
|
|
#define BLEHL_HEAP_MSG_SIZE_ BLEHL_HEAP_MSG_SIZE
|
|
|
|
#define BLEHL_HEAP_ENV_SIZE_ BLEHL_HEAP_ENV_SIZE
|
|
|
|
#define BLEHL_HEAP_DB_SIZE_ BLEHL_HEAP_DB_SIZE
|
2022-08-15 04:20:27 -05:00
|
|
|
#else
|
2023-02-02 00:22:58 -06:00
|
|
|
#define BLEHL_HEAP_MSG_SIZE_ 0
|
|
|
|
#define BLEHL_HEAP_ENV_SIZE_ 0
|
|
|
|
#define BLEHL_HEAP_DB_SIZE_ 0
|
|
|
|
#endif // BLE_HOST_PRESENT
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
/// Kernel Message Heap
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RWIP_HEAP_MSG_SIZE \
|
|
|
|
(BT_HEAP_MSG_SIZE_ + BLE_HEAP_MSG_SIZE_ + BLEHL_HEAP_MSG_SIZE_)
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
/// Number of link in kernel environment
|
2023-02-02 00:22:58 -06:00
|
|
|
#define KE_NB_LINK_IN_HEAP_ENV 4
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
/// Size of Environment heap
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RWIP_HEAP_ENV_SIZE \
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(BT_HEAP_ENV_SIZE_ + \
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(BLE_HEAP_ENV_SIZE_ + BLEHL_HEAP_ENV_SIZE_) * KE_NB_LINK_IN_HEAP_ENV)
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2022-08-15 04:20:27 -05:00
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/// Size of Attribute database heap
|
2023-02-02 00:22:58 -06:00
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#define RWIP_HEAP_DB_SIZE (BLEHL_HEAP_DB_SIZE)
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2022-08-15 04:20:27 -05:00
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2023-02-02 00:22:58 -06:00
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/// Size of non retention heap - 512 bytes per ble link plus 4096 bytes for data
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/// throughput should be sufficient and should be tuned
|
2022-08-15 04:20:27 -05:00
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#if (BLE_EMB_PRESENT || BLE_HOST_PRESENT)
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2023-02-02 00:22:58 -06:00
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#define RWIP_HEAP_NON_RET_SIZE ((512 * BLE_CONNECTION_MAX) + 4096)
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2022-08-15 04:20:27 -05:00
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#else
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2023-02-02 00:22:58 -06:00
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#define RWIP_HEAP_NON_RET_SIZE (1024)
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2022-08-15 04:20:27 -05:00
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#endif
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/// Minimum sleep time to enter in deep sleep (in half slot).
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2023-02-02 00:22:58 -06:00
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#define RWIP_MINIMUM_SLEEP_TIME (1)
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2022-08-15 04:20:27 -05:00
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/******************************************************************************************/
|
2023-02-02 00:22:58 -06:00
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/* ------------------------- CONFIGURABLE PARAMETERS
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* -----------------------------*/
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2022-08-15 04:20:27 -05:00
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/******************************************************************************************/
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/// List of parameters identifiers
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2023-02-02 00:22:58 -06:00
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enum PARAM_ID {
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/// Definition of the tag associated to each parameters
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/// Local Bd Address
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PARAM_ID_BD_ADDRESS = 0x01,
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/// Device Name
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PARAM_ID_DEVICE_NAME = 0x02,
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/// Radio Drift
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PARAM_ID_LPCLK_DRIFT = 0x07,
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/// Radio Jitter
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PARAM_ID_LPCLK_JITTER = 0x08,
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/// Radio Class
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PARAM_ID_RADIO_CLASS = 0x09,
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/// Bluejay specific Settings
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PARAM_ID_BJ_TXCNTL1 = 0x0A,
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/// External wake-up time
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PARAM_ID_EXT_WAKEUP_TIME = 0x0D,
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/// Oscillator wake-up time
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PARAM_ID_OSC_WAKEUP_TIME = 0x0E,
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/// Radio wake-up time
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PARAM_ID_RM_WAKEUP_TIME = 0x0F,
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/// UART baudrate
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PARAM_ID_UART_BAUDRATE = 0x10,
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/// Enable sleep mode
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PARAM_ID_SLEEP_ENABLE = 0x11,
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/// Enable External Wakeup
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PARAM_ID_EXT_WAKEUP_ENABLE = 0x12,
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/// SP Private Key 192
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PARAM_ID_SP_PRIVATE_KEY_P192 = 0x13,
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/// SP Public Key 192
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PARAM_ID_SP_PUBLIC_KEY_P192 = 0x14,
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/// Errata adopted check
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PARAM_ID_ERRATA_ADOPTED = 0x15,
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/// CQDDR Tags
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PARAM_ID_BASIC_THRESHOLD = 0x16,
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PARAM_ID_EDR_THRESHOLD = 0x17,
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PARAM_ID_BASIC_ALGORITHM = 0x18,
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PARAM_ID_EDR_ALGORITHM = 0x19,
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PARAM_ID_BASIC_PACKET_LUT = 0x2A,
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PARAM_ID_EDR_PACKET_LUT = 0x2B,
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/// Synchronous links configuration
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PARAM_ID_SYNC_CONFIG = 0x2C,
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/// PCM Settings
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PARAM_ID_PCM_SETTINGS = 0x2D,
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/// Sleep algorithm duration
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PARAM_ID_SLEEP_ALGO_DUR = 0x2E,
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/// Diagport configuration
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PARAM_ID_DIAG_BT_HW = 0x30,
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PARAM_ID_DIAG_BLE_HW = 0x31,
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PARAM_ID_DIAG_SW = 0x32,
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PARAM_ID_DIAG_PLF = 0x34,
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/// RSSI threshold tags
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PARAM_ID_RSSI_HIGH_THR = 0x3A,
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PARAM_ID_RSSI_LOW_THR = 0x3B,
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PARAM_ID_RSSI_INTERF_THR = 0x3C,
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/// BLE Channel Assessment tags
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PARAM_ID_BLE_CA_TIMER_DUR = 0x40,
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PARAM_ID_BLE_CRA_TIMER_CNT = 0x41,
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PARAM_ID_BLE_CA_MIN_THR = 0x42,
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PARAM_ID_BLE_CA_MAX_THR = 0x43,
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PARAM_ID_BLE_CA_NOISE_THR = 0x44,
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/// AFH algorithm tags
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|
PARAM_ID_AFH_REASS_NBCH = 0x51,
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PARAM_ID_AFH_WINLGTH = 0x52,
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PARAM_ID_AFH_RSSIMIN = 0x53,
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PARAM_ID_AFH_PERTHRESBAD = 0x54,
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PARAM_ID_AFH_REASS_INT = 0x55,
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PARAM_ID_AFH_NMIN = 0x56,
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PARAM_ID_AFH_MAXADAPT = 0x57,
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PARAM_ID_AFH_THSMIN = 0x58,
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PARAM_ID_BT_LINK_KEY_FIRST = 0x60,
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|
PARAM_ID_BT_LINK_KEY_LAST = 0x67,
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PARAM_ID_BLE_LINK_KEY_FIRST = 0x70,
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|
PARAM_ID_BLE_LINK_KEY_LAST = 0x7F,
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|
/// SC Private Key (Low Energy)
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|
|
PARAM_ID_LE_PRIVATE_KEY_P256 = 0x80,
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|
|
/// SC Public Key (Low Energy)
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|
|
PARAM_ID_LE_PUBLIC_KEY_P256 = 0x81,
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|
|
/// SC Debug: Used Fixed Private Key from NVDS (Low Energy)
|
|
|
|
PARAM_ID_LE_DBG_FIXED_P256_KEY = 0x82,
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|
|
/// SP Private Key (classic BT)
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|
|
PARAM_ID_SP_PRIVATE_KEY_P256 = 0x83,
|
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|
|
/// SP Public Key (classic BT)
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|
|
PARAM_ID_SP_PUBLIC_KEY_P256 = 0x84,
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|
|
/// Application specific
|
|
|
|
PARAM_ID_APP_SPECIFIC_FIRST = 0x90,
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|
|
PARAM_ID_APP_SPECIFIC_LAST = 0xAF,
|
2022-08-15 04:20:27 -05:00
|
|
|
};
|
|
|
|
|
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|
|
/// List of parameters lengths
|
2023-02-02 00:22:58 -06:00
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|
|
enum PARAM_LEN {
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|
|
// Definition of length associated to each parameters
|
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|
|
/// Local Bd Address
|
|
|
|
PARAM_LEN_BD_ADDRESS = 6,
|
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|
/// Device Name
|
|
|
|
PARAM_LEN_DEVICE_NAME = 248,
|
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|
|
/// Low power clock drift
|
|
|
|
PARAM_LEN_LPCLK_DRIFT = 2,
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|
|
/// Low power clock jitter
|
|
|
|
PARAM_LEN_LPCLK_JITTER = 1,
|
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|
|
/// Radio Class
|
|
|
|
PARAM_LEN_RADIO_CLASS = 1,
|
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|
|
/// Bluejay specific Settings
|
|
|
|
PARAM_LEN_BJ_TXCNTL1 = 4,
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|
/// External wake-up time
|
|
|
|
PARAM_LEN_EXT_WAKEUP_TIME = 2,
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|
/// Oscillator wake-up time
|
|
|
|
PARAM_LEN_OSC_WAKEUP_TIME = 2,
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|
|
/// Radio wake-up time
|
|
|
|
PARAM_LEN_RM_WAKEUP_TIME = 2,
|
|
|
|
/// UART baudrate
|
|
|
|
PARAM_LEN_UART_BAUDRATE = 4,
|
|
|
|
/// Enable sleep mode
|
|
|
|
PARAM_LEN_SLEEP_ENABLE = 1,
|
|
|
|
/// Enable External Wakeup
|
|
|
|
PARAM_LEN_EXT_WAKEUP_ENABLE = 1,
|
|
|
|
/// SP Private Key 192
|
|
|
|
PARAM_LEN_SP_PRIVATE_KEY_P192 = 24,
|
|
|
|
/// SP Public Key 192
|
|
|
|
PARAM_LEN_SP_PUBLIC_KEY_P192 = 48,
|
|
|
|
/// Errata adopted check
|
|
|
|
PARAM_LEN_ERRATA_ADOPTED = 1,
|
|
|
|
/// CQDDR Tags
|
|
|
|
PARAM_LEN_BASIC_THRESHOLD = 70,
|
|
|
|
PARAM_LEN_EDR_THRESHOLD = 70,
|
|
|
|
PARAM_LEN_BASIC_ALGORITHM = 21,
|
|
|
|
PARAM_LEN_EDR_ALGORITHM = 21,
|
|
|
|
PARAM_LEN_BASIC_PACKET_LUT = 16,
|
|
|
|
PARAM_LEN_EDR_PACKET_LUT = 16,
|
|
|
|
/// Synchronous links configuration
|
|
|
|
PARAM_LEN_SYNC_CONFIG = 2,
|
|
|
|
/// PCM Settings
|
|
|
|
PARAM_LEN_PCM_SETTINGS = 8,
|
|
|
|
/// Diagport configuration
|
|
|
|
PARAM_LEN_DIAG_BT_HW = 4,
|
|
|
|
PARAM_LEN_DIAG_BLE_HW = 4,
|
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|
|
PARAM_LEN_DIAG_SW = 4,
|
|
|
|
PARAM_LEN_DIAG_PLF = 4,
|
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|
|
/// RSSI thresholds
|
|
|
|
PARAM_LEN_RSSI_THR = 1,
|
|
|
|
|
|
|
|
PARAM_LEN_BLE_CA_TIMER_DUR = 2,
|
|
|
|
PARAM_LEN_BLE_CRA_TIMER_CNT = 1,
|
|
|
|
PARAM_LEN_BLE_CA_MIN_THR = 1,
|
|
|
|
PARAM_LEN_BLE_CA_MAX_THR = 1,
|
|
|
|
PARAM_LEN_BLE_CA_NOISE_THR = 1,
|
|
|
|
|
|
|
|
/// AFH algorithm tags
|
|
|
|
PARAM_LEN_AFH_REASS_NBCH = 1,
|
|
|
|
PARAM_LEN_AFH_WINLGTH = 1,
|
|
|
|
PARAM_LEN_AFH_RSSIMIN = 1,
|
|
|
|
PARAM_LEN_AFH_PERTHRESBAD = 1,
|
|
|
|
PARAM_LEN_AFH_REASS_INT = 1,
|
|
|
|
PARAM_LEN_AFH_NMIN = 1,
|
|
|
|
PARAM_LEN_AFH_MAXADAPT = 1,
|
|
|
|
PARAM_LEN_AFH_THSMIN = 1,
|
|
|
|
/// Link keys
|
|
|
|
PARAM_LEN_BT_LINK_KEY = 22,
|
|
|
|
PARAM_LEN_BLE_LINK_KEY = 48,
|
|
|
|
|
|
|
|
/// P256
|
|
|
|
PARAM_LEN_PRIVATE_KEY_P256 = 32,
|
|
|
|
PARAM_LEN_PUBLIC_KEY_P256 = 64,
|
|
|
|
PARAM_LEN_DBG_FIXED_P256_KEY = 1,
|
2022-08-15 04:20:27 -05:00
|
|
|
};
|
|
|
|
|
|
|
|
/******************************************************************************************/
|
2023-02-02 00:22:58 -06:00
|
|
|
/* ------------------------- BT-BLE COEX
|
|
|
|
* -----------------------------------*/
|
2022-08-15 04:20:27 -05:00
|
|
|
/******************************************************************************************/
|
|
|
|
|
2023-02-02 00:22:58 -06:00
|
|
|
/// To let the HW using the default values set in the registers
|
|
|
|
#define RW_BLE_PTI_PRIO_AUTO 15
|
2022-08-15 04:20:27 -05:00
|
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|
|
|
|
|
#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
|
|
|
|
/// Enable and diable definition for the PTI
|
2023-02-02 00:22:58 -06:00
|
|
|
/// Enable TX busy signal
|
|
|
|
#define RWIP_PTI_TXEN 1
|
|
|
|
/// Disable TX busy signal
|
|
|
|
#define RWIP_PTI_TXDIS 0
|
2022-08-15 04:20:27 -05:00
|
|
|
/// Tx busy position
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RWIP_TXBSY_POS 0
|
2022-08-15 04:20:27 -05:00
|
|
|
|
2023-02-02 00:22:58 -06:00
|
|
|
/// Enable RX busy signal
|
|
|
|
#define RWIP_PTI_RXEN 1
|
|
|
|
/// Disable RX busy signal
|
|
|
|
#define RWIP_PTI_RXDIS 0
|
2022-08-15 04:20:27 -05:00
|
|
|
/// Rx busy position
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RWIP_RXBSY_POS 1
|
2022-08-15 04:20:27 -05:00
|
|
|
|
2023-02-02 00:22:58 -06:00
|
|
|
/// Enable do not abort TX
|
|
|
|
#define RWIP_PTI_DNABORTEN 1
|
|
|
|
/// Disable do not abort TX
|
|
|
|
#define RWIP_PTI_DNABORTDIS 0
|
2022-08-15 04:20:27 -05:00
|
|
|
/// Do not abort busy position
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RWIP_DNABORT_POS 2
|
2022-08-15 04:20:27 -05:00
|
|
|
|
2023-02-02 00:22:58 -06:00
|
|
|
/// Allows Tx operation in the current frame.
|
|
|
|
#define RWIP_MWS_TXEN 0
|
|
|
|
/// Prevent from any Tx operation in the current frame.
|
|
|
|
#define RWIP_MWS_TXDIS 1
|
2022-08-15 04:20:27 -05:00
|
|
|
/// MWS transmit disable position
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RWIP_MWSTXDSB_POS 3
|
2022-08-15 04:20:27 -05:00
|
|
|
|
2023-02-02 00:22:58 -06:00
|
|
|
/// Allows Rx operation in the current frame.
|
|
|
|
#define RWIP_MWS_RXEN 0
|
|
|
|
/// Prevent from any Rx operation in the current frame.
|
|
|
|
#define RWIP_MWS_RXDIS 1
|
2022-08-15 04:20:27 -05:00
|
|
|
/// MWS transmit disable position
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RWIP_MWSRXDSB_POS 4
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
/// Bit masking
|
2023-02-02 00:22:58 -06:00
|
|
|
#define RWIP_COEX_BIT_MASK 1
|
2022-08-15 04:20:27 -05:00
|
|
|
|
|
|
|
/// Coex configuration index
|
2023-02-02 00:22:58 -06:00
|
|
|
enum rwip_coex_config_idx {
|
|
|
|
#if (BT_EMB_PRESENT)
|
|
|
|
RWIP_COEX_MSSWITCH_IDX,
|
|
|
|
RWIP_COEX_SNIFFATT_IDX,
|
|
|
|
RWIP_COEX_PAGE_IDX,
|
|
|
|
RWIP_COEX_PSCAN_IDX,
|
|
|
|
RWIP_COEX_INQ_IDX,
|
|
|
|
RWIP_COEX_INQRES_IDX,
|
|
|
|
RWIP_COEX_SCORSVD_IDX,
|
|
|
|
RWIP_COEX_BCAST_IDX,
|
|
|
|
RWIP_COEX_CONNECT_IDX,
|
|
|
|
#endif // #if (BT_EMB_PRESENT)
|
|
|
|
#if (BLE_EMB_PRESENT)
|
|
|
|
RWIP_COEX_CON_IDX,
|
|
|
|
RWIP_COEX_CON_DATA_IDX,
|
|
|
|
RWIP_COEX_ADV_IDX,
|
|
|
|
RWIP_COEX_SCAN_IDX,
|
|
|
|
RWIP_COEX_INIT_IDX,
|
|
|
|
#endif // #if (BLE_EMB_PRESENT)
|
|
|
|
/// Max configuration index
|
|
|
|
RWIP_COEX_CFG_MAX,
|
2022-08-15 04:20:27 -05:00
|
|
|
};
|
|
|
|
#endif //(BLE_EMB_PRESENT || BT_EMB_PRESENT)
|
|
|
|
|
|
|
|
/******************************************************************************************/
|
2023-02-02 00:22:58 -06:00
|
|
|
/* ------------------------- BT-BLE PRIORITIES
|
|
|
|
* -----------------------------------*/
|
2022-08-15 04:20:27 -05:00
|
|
|
/******************************************************************************************/
|
|
|
|
#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
|
|
|
|
/// Priority index definition
|
2023-02-02 00:22:58 -06:00
|
|
|
enum rwip_prio_idx {
|
|
|
|
#if (BT_EMB_PRESENT)
|
|
|
|
/// ACL event default priority
|
|
|
|
RWIP_PRIO_ACL_DFT_IDX,
|
|
|
|
/// ACL event priority with activity
|
|
|
|
RWIP_PRIO_ACL_ACT_IDX,
|
|
|
|
/// ACL Role Switch event default priority
|
|
|
|
RWIP_PRIO_ACL_RSW_IDX,
|
|
|
|
/// ACL sniff event default priority
|
|
|
|
RWIP_PRIO_ACL_SNIFF_DFT_IDX,
|
|
|
|
/// ACL sniff transition event default priority
|
|
|
|
RWIP_PRIO_ACL_SNIFF_TRANS_IDX,
|
|
|
|
#if MAX_NB_SYNC
|
|
|
|
/// SCO event default priority
|
|
|
|
RWIP_PRIO_SCO_DFT_IDX,
|
|
|
|
#endif // MAX_NB_SYNC
|
|
|
|
/// Broadcast ACL event default priority
|
|
|
|
RWIP_PRIO_BCST_DFT_IDX,
|
|
|
|
/// Broadcast ACL event with LMP activity priority
|
|
|
|
RWIP_PRIO_BCST_ACT_IDX,
|
|
|
|
/// CSB RX event default priority
|
|
|
|
RWIP_PRIO_CSB_RX_DFT_IDX,
|
|
|
|
/// CSB TX event default priority
|
|
|
|
RWIP_PRIO_CSB_TX_DFT_IDX,
|
|
|
|
/// Inquiry event default priority
|
|
|
|
RWIP_PRIO_INQ_DFT_IDX,
|
|
|
|
/// Inquiry Scan event default priority
|
|
|
|
RWIP_PRIO_ISCAN_DFT_IDX,
|
|
|
|
/// Page event default priority
|
|
|
|
RWIP_PRIO_PAGE_DFT_IDX,
|
|
|
|
/// Page event default priority
|
|
|
|
RWIP_PRIO_PAGE_1ST_PKT_IDX,
|
|
|
|
/// Page first packet event default priority
|
|
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RWIP_PRIO_PCA_DFT_IDX,
|
|
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|
/// Page scan event default priority
|
|
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|
RWIP_PRIO_PSCAN_DFT_IDX,
|
|
|
|
/// Page scan event priority increment when canceled
|
|
|
|
RWIP_PRIO_PSCAN_1ST_PKT_IDX,
|
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|
|
/// Synchronization Scan event default priority
|
|
|
|
RWIP_PRIO_SSCAN_DFT_IDX,
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|
|
/// Synchronization Train event default priority
|
|
|
|
RWIP_PRIO_STRAIN_DFT_IDX,
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#endif // #if (BT_EMB_PRESENT)
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|
|
#if (BLE_EMB_PRESENT)
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|
|
|
/// Default priority for scanning events
|
|
|
|
RWIP_PRIO_SCAN_IDX,
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|
|
/// Default priority for initiating events
|
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|
|
RWIP_PRIO_INIT_IDX,
|
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|
|
/// Default priority for master connect events
|
|
|
|
RWIP_PRIO_MCONNECT_IDX,
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|
|
|
/// Default priority for slave connect events
|
|
|
|
RWIP_PRIO_SCONNECT_IDX,
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|
|
|
/// Default priority for advertising events
|
|
|
|
RWIP_PRIO_ADV_IDX,
|
|
|
|
/// Default priority for advertising high duty cycle events
|
|
|
|
RWIP_PRIO_ADV_HDC_IDX,
|
|
|
|
/// Default priority for resolvable private addresses renewal event
|
|
|
|
RWIP_PRIO_RPA_RENEW_IDX,
|
|
|
|
#endif // #if (BLE_EMB_PRESENT)
|
|
|
|
RWIP_PRIO_IDX_MAX
|
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|
|
|
};
|
|
|
|
/// Default priority value definition
|
2023-02-02 00:22:58 -06:00
|
|
|
enum rwip_prio_dft {
|
|
|
|
#if (BT_EMB_PRESENT)
|
|
|
|
/// ACL event default priority
|
|
|
|
RWIP_PRIO_ACL_DFT = 5,
|
|
|
|
/// ACL event priority with activity
|
|
|
|
RWIP_PRIO_ACL_ACT = 10,
|
|
|
|
/// ACL Role Switch event default priority
|
|
|
|
RWIP_PRIO_ACL_RSW = 20,
|
|
|
|
/// ACL sniff event default priority
|
|
|
|
RWIP_PRIO_ACL_SNIFF_DFT = 15,
|
|
|
|
/// ACL sniff transition event default priority
|
|
|
|
RWIP_PRIO_ACL_SNIFF_TRANS = 10,
|
|
|
|
#if MAX_NB_SYNC
|
|
|
|
/// SCO event default priority
|
|
|
|
RWIP_PRIO_SCO_DFT = 18,
|
|
|
|
#endif // MAX_NB_SYNC
|
|
|
|
/// Broadcast ACL event default priority
|
|
|
|
RWIP_PRIO_BCST_DFT = 5,
|
|
|
|
/// Broadcast ACL event with LMP activity priority
|
|
|
|
RWIP_PRIO_BCST_ACT = 10,
|
|
|
|
/// CSB RX event default priority
|
|
|
|
RWIP_PRIO_CSB_RX_DFT = 10,
|
|
|
|
/// CSB TX event default priority
|
|
|
|
RWIP_PRIO_CSB_TX_DFT = 10,
|
|
|
|
/// Inquiry event default priority
|
|
|
|
RWIP_PRIO_INQ_DFT = 5,
|
|
|
|
/// Inquiry Scan event default priority
|
|
|
|
RWIP_PRIO_ISCAN_DFT = 5,
|
|
|
|
/// Page event default priority
|
|
|
|
RWIP_PRIO_PAGE_DFT = 8,
|
|
|
|
/// Page first packet event default priority
|
|
|
|
RWIP_PRIO_PAGE_1ST_PKT = 20,
|
|
|
|
/// PCA event default priority
|
|
|
|
RWIP_PRIO_PCA_DFT = 20,
|
|
|
|
/// Page scan event default priority
|
|
|
|
RWIP_PRIO_PSCAN_DFT = 8,
|
|
|
|
/// Page scan event priority increment when canceled
|
|
|
|
RWIP_PRIO_PSCAN_1ST_PKT = 20,
|
|
|
|
/// Synchronization Scan event default priority
|
|
|
|
RWIP_PRIO_SSCAN_DFT = 10,
|
|
|
|
/// Synchronization Train event default priority
|
|
|
|
RWIP_PRIO_STRAIN_DFT = 10,
|
|
|
|
#endif // #if (BT_EMB_PRESENT)
|
|
|
|
#if (BLE_EMB_PRESENT)
|
|
|
|
/// Default priority for scanning events
|
|
|
|
RWIP_PRIO_SCAN_DFT = 5,
|
|
|
|
/// Default priority for initiating events
|
|
|
|
RWIP_PRIO_INIT_DFT = 10,
|
|
|
|
/// Default priority for master connect events
|
|
|
|
RWIP_PRIO_MCONNECT_DFT = 15,
|
|
|
|
/// Default priority for slave connect events
|
|
|
|
RWIP_PRIO_SCONNECT_DFT = 15,
|
|
|
|
/// Default priority for advertising events
|
|
|
|
RWIP_PRIO_ADV_DFT = 5,
|
|
|
|
/// Default priority for advertising high duty cycle events
|
|
|
|
RWIP_PRIO_ADV_HDC_DFT = 10,
|
|
|
|
/// Default priority for resolvable private addresses renewal event
|
|
|
|
RWIP_PRIO_RPA_RENEW_DFT = 10,
|
|
|
|
#endif // #if (BLE_EMB_PRESENT)
|
|
|
|
/// Max priority
|
|
|
|
RWIP_PRIO_MAX = 31,
|
2022-08-15 04:20:27 -05:00
|
|
|
};
|
|
|
|
/// Default increment value definition
|
2023-02-02 00:22:58 -06:00
|
|
|
enum rwip_incr_dft {
|
|
|
|
#if (BT_EMB_PRESENT)
|
|
|
|
/// ACL event default increment
|
|
|
|
RWIP_INCR_ACL_DFT = 1,
|
|
|
|
/// ACL event increment with activity
|
|
|
|
RWIP_INCR_ACL_ACT = 1,
|
|
|
|
/// ACL Role Switch event default increment
|
|
|
|
RWIP_INCR_ACL_RSW = 1,
|
|
|
|
/// ACL sniff event default increment
|
|
|
|
RWIP_INCR_ACL_SNIFF_DFT = 1,
|
|
|
|
/// ACL sniff transition event default increment
|
|
|
|
RWIP_INCR_ACL_SNIFF_TRANS = 1,
|
|
|
|
#if MAX_NB_SYNC
|
|
|
|
/// SCO event default increment
|
|
|
|
RWIP_INCR_SCO_DFT = 1,
|
|
|
|
#endif // MAX_NB_SYNC
|
|
|
|
/// Broadcast ACL event default increment
|
|
|
|
RWIP_INCR_BCST_DFT = 1,
|
|
|
|
/// Broadcast ACL event with LMP activity increment
|
|
|
|
RWIP_INCR_BCST_ACT = 1,
|
|
|
|
/// CSB RX event default increment
|
|
|
|
RWIP_INCR_CSB_RX_DFT = 1,
|
|
|
|
/// CSB TX event default increment
|
|
|
|
RWIP_INCR_CSB_TX_DFT = 1,
|
|
|
|
/// Inquiry event default increment
|
|
|
|
RWIP_INCR_INQ_DFT = 1,
|
|
|
|
/// Inquiry Scan event default increment
|
|
|
|
RWIP_INCR_ISCAN_DFT = 1,
|
|
|
|
/// Page event default increment
|
|
|
|
RWIP_INCR_PAGE_DFT = 1,
|
|
|
|
/// Page event default increment
|
|
|
|
RWIP_INCR_PAGE_1ST_PKT = 2,
|
|
|
|
/// Page first packet event default increment
|
|
|
|
RWIP_INCR_PCA_DFT = 1,
|
|
|
|
/// Page scan event default increment
|
|
|
|
RWIP_INCR_PSCAN_DFT = 1,
|
|
|
|
/// Page scan event increment increment when canceled
|
|
|
|
RWIP_INCR_PSCAN_1ST_PKT = 1,
|
|
|
|
/// Synchronization Scan event default increment
|
|
|
|
RWIP_INCR_SSCAN_DFT = 1,
|
|
|
|
/// Synchronization Train event default increment
|
|
|
|
RWIP_INCR_STRAIN_DFT = 1,
|
|
|
|
#endif // #if (BT_EMB_PRESENT)
|
|
|
|
#if (BLE_EMB_PRESENT)
|
|
|
|
/// Default increment for scanning events
|
|
|
|
RWIP_INCR_SCAN_DFT = 1,
|
|
|
|
/// Default increment for initiating events
|
|
|
|
RWIP_INCR_INIT_DFT = 1,
|
|
|
|
/// Default increment for master connect events
|
|
|
|
RWIP_INCR_MCONNECT_DFT = 1,
|
|
|
|
/// Default increment for slave connect events
|
|
|
|
RWIP_INCR_SCONNECT_DFT = 1,
|
|
|
|
/// Default increment for advertising events
|
|
|
|
RWIP_INCR_ADV_DFT = 1,
|
|
|
|
/// Default increment for advertising high duty cycle events
|
|
|
|
RWIP_INCR_ADV_HDC_PRIO_DFT = 1,
|
|
|
|
/// Default increment for resolvable private addresses renewal event
|
|
|
|
RWIP_INCR_RPA_RENEW_DFT = 1,
|
|
|
|
#endif // #if (BLE_EMB_PRESENT)
|
2022-08-15 04:20:27 -05:00
|
|
|
};
|
2023-02-02 00:22:58 -06:00
|
|
|
#endif // #if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
|
2022-08-15 04:20:27 -05:00
|
|
|
/// @} BT Stack Configuration
|
|
|
|
/// @} ROOT
|
|
|
|
|
2023-02-02 00:22:58 -06:00
|
|
|
#endif // RWIP_CONFIG_H_
|